From patchwork Fri Sep 18 22:30:47 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 33901 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 45D55B7B76 for ; Sat, 19 Sep 2009 08:34:27 +1000 (EST) Received: from localhost ([127.0.0.1]:36004 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Mom24-0003wF-R1 for incoming@patchwork.ozlabs.org; Fri, 18 Sep 2009 18:34:24 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Mom1U-0003sa-79 for qemu-devel@nongnu.org; Fri, 18 Sep 2009 18:33:48 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Mom1P-0003lB-Ao for qemu-devel@nongnu.org; Fri, 18 Sep 2009 18:33:47 -0400 Received: from [199.232.76.173] (port=38475 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Mom1P-0003kl-4G for qemu-devel@nongnu.org; Fri, 18 Sep 2009 18:33:43 -0400 Received: from va3ehsobe004.messaging.microsoft.com ([216.32.180.14]:52859 helo=VA3EHSOBE004.bigfish.com) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_ARCFOUR_MD5:16) (Exim 4.60) (envelope-from ) id 1Mom1O-0003Aq-QI for qemu-devel@nongnu.org; Fri, 18 Sep 2009 18:33:42 -0400 Received: from mail132-va3-R.bigfish.com (10.7.14.248) by VA3EHSOBE004.bigfish.com (10.7.40.24) with Microsoft SMTP Server id 8.1.340.0; Fri, 18 Sep 2009 22:33:41 +0000 Received: from mail132-va3 (localhost.localdomain [127.0.0.1]) by mail132-va3-R.bigfish.com (Postfix) with ESMTP id B80AC1B7810E for ; Fri, 18 Sep 2009 22:33:41 +0000 (UTC) X-SpamScore: 1 X-BigFish: VPS1(zzzz1202hzzz32i203h61h) X-Spam-TCS-SCL: 0:0 Received: by mail132-va3 (MessageSwitch) id 1253313220598106_2866; Fri, 18 Sep 2009 22:33:40 +0000 (UCT) Received: from ausb3extmailp02.amd.com (ausb3extmailp02.amd.com [163.181.251.22]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail132-va3.bigfish.com (Postfix) with ESMTP id 78CBC1058052 for ; Fri, 18 Sep 2009 22:33:40 +0000 (UTC) Received: from ausb3twp01.amd.com (ausb3twp01.amd.com [163.181.250.37]) by ausb3extmailp02.amd.com (Switch-3.2.7/Switch-3.2.7) with ESMTP id n8IMXa4K031018 for ; Fri, 18 Sep 2009 17:33:39 -0500 X-WSS-ID: 0KQ6UNZ-01-KS7-02 X-M-MSG: Received: from sausexbh2.amd.com (SAUSEXBH2.amd.com [163.181.22.102]) by ausb3twp01.amd.com (Tumbleweed MailGate 3.7.0) with ESMTP id 2B3B81028508 for ; Fri, 18 Sep 2009 17:33:35 -0500 (CDT) Received: from sausexmb2.amd.com ([163.181.3.157]) by sausexbh2.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 18 Sep 2009 17:33:36 -0500 Received: from SDRSEXMB1.amd.com ([172.20.3.116]) by sausexmb2.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 18 Sep 2009 17:33:36 -0500 Received: from seurexmb1.amd.com ([165.204.9.130]) by SDRSEXMB1.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Sat, 19 Sep 2009 00:33:24 +0200 Received: from mail.osrc.amd.com ([165.204.16.204]) by seurexmb1.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Sat, 19 Sep 2009 00:33:23 +0200 Received: from localhost.localdomain (hagen.osrc.amd.com [165.204.15.42]) by mail.osrc.amd.com (Postfix) with ESMTP id A859A49C1B3; Fri, 18 Sep 2009 23:33:23 +0100 (BST) From: Andre Przywara To: qemu-devel@nongnu.org Date: Sat, 19 Sep 2009 00:30:47 +0200 Message-ID: <1253313049-25874-3-git-send-email-andre.przywara@amd.com> X-Mailer: git-send-email 1.6.1.3 In-Reply-To: <1253313049-25874-1-git-send-email-andre.przywara@amd.com> References: <1253313049-25874-1-git-send-email-andre.przywara@amd.com> X-OriginalArrivalTime: 18 Sep 2009 22:33:23.0993 (UTC) FILETIME=[08684090:01CA38B0] MIME-Version: 1.0 X-detected-operating-system: by monty-python.gnu.org: Windows 2000 SP4, XP SP1+ Cc: Andre Przywara Subject: [Qemu-devel] [PATCH 2/4] TCG x86: add lock mov cr0 = cr8 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org AMD CPUs featuring a shortcut to access CR8 even from 32-bit mode. If you use the LOCK prefix with "mov CR0", it accesses CR8 instead. This behavior is guarded by the CR8_LEGACY CPUID bit (Fn8000_0001:ECX[1]). Signed-off-by: Andre Przywara --- target-i386/translate.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index aaa4492..134c870 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -7362,6 +7362,10 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) ot = OT_QUAD; else ot = OT_LONG; + if ((prefixes & PREFIX_LOCK) && (reg == 0) && + (s->cpuid_ext3_features & CPUID_EXT3_CR8LEG)) { + reg = 8; + } switch(reg) { case 0: case 2: