From patchwork Fri May 25 11:29:02 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guan Xuetao X-Patchwork-Id: 161297 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id A1215B6F77 for ; Fri, 25 May 2012 21:22:55 +1000 (EST) Received: from localhost ([::1]:53841 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SXsbd-0004rs-Bh for incoming@patchwork.ozlabs.org; Fri, 25 May 2012 07:22:53 -0400 Received: from eggs.gnu.org ([208.118.235.92]:40814) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SXsbO-0004pf-Ka for qemu-devel@nongnu.org; Fri, 25 May 2012 07:22:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SXsbM-0007Va-JG for qemu-devel@nongnu.org; Fri, 25 May 2012 07:22:38 -0400 Received: from mprc.pku.edu.cn ([162.105.203.9]:46122) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SXsbL-0007VH-DP for qemu-devel@nongnu.org; Fri, 25 May 2012 07:22:36 -0400 Received: from linuxdev-32 ([162.105.203.8]) by mprc.pku.edu.cn (8.13.8/8.13.8) with ESMTP id q4PBt42o031604; Fri, 25 May 2012 19:55:04 +0800 Received: by linuxdev-32 (Postfix, from userid 1000) id 44C971460588; Fri, 25 May 2012 19:29:16 +0800 (CST) From: Guan Xuetao To: qemu-devel@nongnu.org Date: Fri, 25 May 2012 19:29:02 +0800 Message-Id: <09b1a3e9bb99749459febae17f7e92b201ca7b1d.1337944756.git.gxt@mprc.pku.edu.cn> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) X-Received-From: 162.105.203.9 Cc: blauwirbel@gmail.com, Guan Xuetao Subject: [Qemu-devel] [PATCH 4/9] unicore32-softmmu: make sure that kernel can access user space X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Guan Xuetao --- target-unicore32/translate.c | 33 ++++++++++++++++++++++++--------- 1 files changed, 24 insertions(+), 9 deletions(-) diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c index d76fff0..1f0ba4f 100644 --- a/target-unicore32/translate.c +++ b/target-unicore32/translate.c @@ -33,9 +33,16 @@ typedef struct DisasContext { int condlabel; struct TranslationBlock *tb; int singlestep_enabled; +#ifndef CONFIG_USER_ONLY + int user; +#endif } DisasContext; +#ifndef CONFIG_USER_ONLY +#define IS_USER(s) (s->user) +#else #define IS_USER(s) 1 +#endif /* These instructions trap after executing, so defer them until after the conditional executions state has been updated. */ @@ -1551,12 +1558,12 @@ static void do_misc(CPUUniCore32State *env, DisasContext *s, uint32_t insn) /* load/store I_offset and R_offset */ static void do_ldst_ir(CPUUniCore32State *env, DisasContext *s, uint32_t insn) { - unsigned int i; + unsigned int mmuindex; TCGv tmp; TCGv tmp2; tmp2 = load_reg(s, UCOP_REG_N); - i = (IS_USER(s) || (!UCOP_SET_P && UCOP_SET_W)); + mmuindex = (IS_USER(s) || (!UCOP_SET_P && UCOP_SET_W)); /* immediate */ if (UCOP_SET_P) { @@ -1566,17 +1573,17 @@ static void do_ldst_ir(CPUUniCore32State *env, DisasContext *s, uint32_t insn) if (UCOP_SET_L) { /* load */ if (UCOP_SET_B) { - tmp = gen_ld8u(tmp2, i); + tmp = gen_ld8u(tmp2, mmuindex); } else { - tmp = gen_ld32(tmp2, i); + tmp = gen_ld32(tmp2, mmuindex); } } else { /* store */ tmp = load_reg(s, UCOP_REG_D); if (UCOP_SET_B) { - gen_st8(tmp, tmp2, i); + gen_st8(tmp, tmp2, mmuindex); } else { - gen_st32(tmp, tmp2, i); + gen_st32(tmp, tmp2, mmuindex); } } if (!UCOP_SET_P) { @@ -1679,7 +1686,7 @@ static void do_ldst_hwsb(CPUUniCore32State *env, DisasContext *s, uint32_t insn) /* load/store multiple words */ static void do_ldst_m(CPUUniCore32State *env, DisasContext *s, uint32_t insn) { - unsigned int val, i; + unsigned int val, i, mmuindex; int j, n, reg, user, loaded_base; TCGv tmp; TCGv tmp2; @@ -1700,6 +1707,7 @@ static void do_ldst_m(CPUUniCore32State *env, DisasContext *s, uint32_t insn) } } + mmuindex = (IS_USER(s) || (!UCOP_SET_P && UCOP_SET_W)); addr = load_reg(s, UCOP_REG_N); /* compute total size */ @@ -1744,7 +1752,7 @@ static void do_ldst_m(CPUUniCore32State *env, DisasContext *s, uint32_t insn) } if (UCOP_SET(i)) { if (UCOP_SET_L) { /* load */ - tmp = gen_ld32(addr, IS_USER(s)); + tmp = gen_ld32(addr, mmuindex); if (reg == 31) { gen_bx(s, tmp); } else if (user) { @@ -1772,7 +1780,7 @@ static void do_ldst_m(CPUUniCore32State *env, DisasContext *s, uint32_t insn) } else { tmp = load_reg(s, reg); } - gen_st32(tmp, addr, IS_USER(s)); + gen_st32(tmp, addr, mmuindex); } j++; /* no need to add after the last transfer */ @@ -1953,6 +1961,13 @@ static inline void gen_intermediate_code_internal(CPUUniCore32State *env, cpu_F1s = tcg_temp_new_i32(); cpu_F0d = tcg_temp_new_i64(); cpu_F1d = tcg_temp_new_i64(); +#ifndef CONFIG_USER_ONLY + if ((env->uncached_asr & 0x1f) == 0x10) { + dc->user = 1; + } else { + dc->user = 0; + } +#endif next_page_start = (pc_start & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE; lj = -1; num_insns = 0;