Show patches with: Series = hw/riscv: sifive_u: Add missing SPI support       |    State = Action Required       |   25 patches
Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[v2,01/25] hw/block: m25p80: Add ISSI SPI flash support hw/riscv: sifive_u: Add missing SPI support - - - - --- 2021-01-23 Bin Meng New
[v2,02/25] hw/block: m25p80: Add various ISSI flash information hw/riscv: sifive_u: Add missing SPI support 1 - - - --- 2021-01-23 Bin Meng New
[v2,03/25] hw/sd: ssi-sd: Fix incorrect card response sequence hw/riscv: sifive_u: Add missing SPI support - 1 2 1 --- 2021-01-23 Bin Meng New
[v2,04/25] hw/sd: sd: Support CMD59 for SPI mode hw/riscv: sifive_u: Add missing SPI support - - 2 1 --- 2021-01-23 Bin Meng New
[v2,05/25] hw/sd: sd: Drop sd_crc16() hw/riscv: sifive_u: Add missing SPI support - - 2 1 --- 2021-01-23 Bin Meng New
[v2,06/25] util: Add CRC16 (CCITT) calculation routines hw/riscv: sifive_u: Add missing SPI support 1 - 1 - --- 2021-01-23 Bin Meng New
[v2,07/25] hw/sd: ssi-sd: Suffix a data block with CRC16 hw/riscv: sifive_u: Add missing SPI support 1 1 1 - --- 2021-01-23 Bin Meng New
[v2,08/25] hw/sd: ssi-sd: Add a state representing Nac hw/riscv: sifive_u: Add missing SPI support 1 - - - --- 2021-01-23 Bin Meng New
[v2,09/25] hw/sd: ssi-sd: Fix the wrong command index for STOP_TRANSMISSION hw/riscv: sifive_u: Add missing SPI support - 1 1 - --- 2021-01-23 Bin Meng New
[v2,10/25] hw/sd: ssi-sd: Support multiple block read hw/riscv: sifive_u: Add missing SPI support 1 - - - --- 2021-01-23 Bin Meng New
[v2,11/25] hw/sd: ssi-sd: Use macros for the dummy value and tokens in the transfer hw/riscv: sifive_u: Add missing SPI support - - 2 - --- 2021-01-23 Bin Meng New
[v2,12/25] hw/sd: sd: Remove duplicated codes in single/multiple block read/write hw/riscv: sifive_u: Add missing SPI support 1 - - - --- 2021-01-23 Bin Meng New
[v2,13/25] hw/sd: sd: Allow single/multiple block write for SPI mode hw/riscv: sifive_u: Add missing SPI support 1 - - - --- 2021-01-23 Bin Meng New
[v2,14/25] hw/sd: sd.h: Cosmetic change of using spaces hw/riscv: sifive_u: Add missing SPI support - - 2 - --- 2021-01-23 Bin Meng New
[v2,15/25] hw/sd: Introduce receive_ready() callback hw/riscv: sifive_u: Add missing SPI support 1 - 1 - --- 2021-01-23 Bin Meng New
[v2,16/25] hw/sd: ssi-sd: Support single block write hw/riscv: sifive_u: Add missing SPI support 1 - - - --- 2021-01-23 Bin Meng New
[v2,17/25] hw/sd: ssi-sd: Support multiple block write hw/riscv: sifive_u: Add missing SPI support 1 - - - --- 2021-01-23 Bin Meng New
[v2,18/25] hw/sd: ssi-sd: Bump up version ids of VMStateDescription hw/riscv: sifive_u: Add missing SPI support - - - - --- 2021-01-23 Bin Meng New
[v2,19/25] hw/ssi: Add SiFive SPI controller support hw/riscv: sifive_u: Add missing SPI support - - - - --- 2021-01-23 Bin Meng New
[v2,20/25] hw/riscv: sifive_u: Add QSPI0 controller and connect a flash hw/riscv: sifive_u: Add missing SPI support - - 1 - --- 2021-01-23 Bin Meng New
[v2,21/25] hw/riscv: sifive_u: Add QSPI2 controller and connect an SD card hw/riscv: sifive_u: Add missing SPI support - - 1 - --- 2021-01-23 Bin Meng New
[v2,22/25] hw/riscv: sifive_u: Change SIFIVE_U_GEM_IRQ to decimal value hw/riscv: sifive_u: Add missing SPI support - - 1 - --- 2021-01-23 Bin Meng New
[v2,23/25] docs/system: Sort targets in alphabetical order hw/riscv: sifive_u: Add missing SPI support - - 1 - --- 2021-01-23 Bin Meng New
[v2,24/25] docs/system: Add RISC-V documentation hw/riscv: sifive_u: Add missing SPI support - - 1 - --- 2021-01-23 Bin Meng New
[v2,25/25] docs/system: riscv: Add documentation for sifive_u machine hw/riscv: sifive_u: Add missing SPI support - - 1 - --- 2021-01-23 Bin Meng New