Show patches with: State = Action Required       |   429930 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
vhost-user: only set slave channel for first vq vhost-user: only set slave channel for first vq - 1 - - --- 2020-01-21 Adrián Moreno mst New
[v3] vhost-user: save features if the char dev is closed [v3] vhost-user: save features if the char dev is closed 1 1 - - --- 2019-09-24 Adrián Moreno mst New
[v2,5/5] pl031: switch clock base to rtc_clock - - - - --- 2012-03-05 Paolo Bonzini pm215 New
[v2,4/5] pl031: rearm alarm timer upon load - - - - --- 2012-03-05 Paolo Bonzini pm215 New
[v2,3/5] arm: switch real-time clocks to rtc_clock - - - - --- 2012-03-05 Paolo Bonzini pm215 New
[v2,2/5] omap: switch omap_lpg to vm_clock - - - - --- 2012-03-05 Paolo Bonzini pm215 New
[v2,1/5] rtc: add -rtc clock=rt - - - - --- 2012-03-05 Paolo Bonzini pm215 New
[RFC,3/3] tests/qtest/migration-test: Enable test_ignore_shared Fix s390x flic migration and add some more qtests - - - - --- 2024-05-25 Nicholas Piggin New
[RFC,2/3] tests/qtest/migration-test: enable on s390x Fix s390x flic migration and add some more qtests - - - - --- 2024-05-25 Nicholas Piggin New
[RFC,1/3] hw/intc/s390_flic: Migrate pending state Fix s390x flic migration and add some more qtests - - - - --- 2024-05-25 Nicholas Piggin New
[PULL,24/24] migration: remove unnecessary zlib dependency [PULL,01/24] configure: move -mcx16 flag out of CPU_CFLAGS - - - - --- 2024-05-25 Paolo Bonzini New
[PULL,23/24] meson: do not query modules before they are processed [PULL,01/24] configure: move -mcx16 flag out of CPU_CFLAGS - - - - --- 2024-05-25 Paolo Bonzini New
[PULL,22/24] tcg: include dependencies in static_library() [PULL,01/24] configure: move -mcx16 flag out of CPU_CFLAGS - - - - --- 2024-05-25 Paolo Bonzini New
[PULL,21/24] meson: remove unnecessary dependency [PULL,01/24] configure: move -mcx16 flag out of CPU_CFLAGS - - - - --- 2024-05-25 Paolo Bonzini New
[PULL,20/24] meson: remove unnecessary reference to libm [PULL,01/24] configure: move -mcx16 flag out of CPU_CFLAGS - - - - --- 2024-05-25 Paolo Bonzini New
[PULL,19/24] target/i386: remove aflag argument of gen_lea_v_seg [PULL,01/24] configure: move -mcx16 flag out of CPU_CFLAGS - - 1 - --- 2024-05-25 Paolo Bonzini New
[PULL,18/24] target/i386: clean up repeated string operations [PULL,01/24] configure: move -mcx16 flag out of CPU_CFLAGS - - 1 - --- 2024-05-25 Paolo Bonzini New
[PULL,17/24] target/i386: introduce gen_lea_ss_ofs [PULL,01/24] configure: move -mcx16 flag out of CPU_CFLAGS - - 1 - --- 2024-05-25 Paolo Bonzini New
[PULL,16/24] target/i386: use mo_stacksize more [PULL,01/24] configure: move -mcx16 flag out of CPU_CFLAGS - - 1 - --- 2024-05-25 Paolo Bonzini New
[PULL,15/24] target/i386: inline gen_add_A0_ds_seg [PULL,01/24] configure: move -mcx16 flag out of CPU_CFLAGS - - 1 - --- 2024-05-25 Paolo Bonzini New
[PULL,14/24] target/i386: split gen_ldst_modrm for load and store [PULL,01/24] configure: move -mcx16 flag out of CPU_CFLAGS - - 1 - --- 2024-05-25 Paolo Bonzini New
[PULL,13/24] target/i386: reg in gen_ldst_modrm is always OR_TMP0 [PULL,01/24] configure: move -mcx16 flag out of CPU_CFLAGS - - 1 - --- 2024-05-25 Paolo Bonzini New
[PULL,12/24] target/i386: raze the gen_eob* jungle [PULL,01/24] configure: move -mcx16 flag out of CPU_CFLAGS - - 1 - --- 2024-05-25 Paolo Bonzini New
[PULL,11/24] target/i386: assert that gen_update_eip_cur and gen_update_eip_next are the same in tb… [PULL,01/24] configure: move -mcx16 flag out of CPU_CFLAGS - - 1 - --- 2024-05-25 Paolo Bonzini New
[PULL,10/24] target/i386: avoid calling gen_eob_inhibit_irq before tb_stop [PULL,01/24] configure: move -mcx16 flag out of CPU_CFLAGS - - 1 - --- 2024-05-25 Paolo Bonzini New
[PULL,09/24] target/i386: avoid calling gen_eob_syscall before tb_stop [PULL,01/24] configure: move -mcx16 flag out of CPU_CFLAGS - - 1 - --- 2024-05-25 Paolo Bonzini New
[PULL,08/24] target/i386: document and group DISAS_* constants [PULL,01/24] configure: move -mcx16 flag out of CPU_CFLAGS - - 1 - --- 2024-05-25 Paolo Bonzini New
[PULL,07/24] target/i386: set CC_OP in helpers if they want CC_OP_EFLAGS [PULL,01/24] configure: move -mcx16 flag out of CPU_CFLAGS - - 1 - --- 2024-05-25 Paolo Bonzini New
[PULL,06/24] target/i386: cpu_load_eflags already sets cc_op [PULL,01/24] configure: move -mcx16 flag out of CPU_CFLAGS - - 1 - --- 2024-05-25 Paolo Bonzini New
[PULL,05/24] target/i386: remove unnecessary gen_update_cc_op before gen_eob* [PULL,01/24] configure: move -mcx16 flag out of CPU_CFLAGS - - 1 - --- 2024-05-25 Paolo Bonzini New
[PULL,04/24] target/i386: cleanup eob handling of RSM [PULL,01/24] configure: move -mcx16 flag out of CPU_CFLAGS - - 1 - --- 2024-05-25 Paolo Bonzini New
[PULL,03/24] target/i386: no single-step exception after MOV or POP SS [PULL,01/24] configure: move -mcx16 flag out of CPU_CFLAGS - - - - --- 2024-05-25 Paolo Bonzini New
[PULL,02/24] target/i386: disable jmp_opt if EFLAGS.RF is 1 [PULL,01/24] configure: move -mcx16 flag out of CPU_CFLAGS - - 1 - --- 2024-05-25 Paolo Bonzini New
[PULL,01/24] configure: move -mcx16 flag out of CPU_CFLAGS [PULL,01/24] configure: move -mcx16 flag out of CPU_CFLAGS - - - - --- 2024-05-25 Paolo Bonzini New
[PULL,00/24] Build system and target/i386/translate.c cleanups for 2025-05-25 - - - - --- 2024-05-25 Paolo Bonzini New
[3/3] tests/qtest/migration-test: Use custom asm bios for ppc64 tests/qtest/migration-test: Improve and enable on ppc64 - - - - --- 2024-05-25 Nicholas Piggin New
[2/3] tests/qtest/migration-test: Enable on ppc64 tests/qtest/migration-test: Improve and enable on ppc64 - - - - --- 2024-05-25 Nicholas Piggin New
[1/3] tests/qtest/migration-test: Quieten ppc64 QEMU warnigns tests/qtest/migration-test: Improve and enable on ppc64 - - - - --- 2024-05-25 Nicholas Piggin New
[v2,67/67] target/arm: Convert FCSEL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,66/67] target/arm: Convert FMADD, FMSUB, FNMADD, FNMSUB to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,65/67] target/arm: Convert SQDMULH, SQRDMULH to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,64/67] target/arm: Tidy SQDMULH, SQRDMULH (vector) target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,63/67] target/arm: Convert MLA, MLS to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,62/67] target/arm: Convert MUL, PMUL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,61/67] target/arm: Convert SABA, SABD, UABA, UABD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,60/67] target/arm: Convert SMAX, SMIN, UMAX, UMIN to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,59/67] target/arm: Convert SRHADD, URHADD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,58/67] target/arm: Convert SRHADD, URHADD to gvec target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,57/67] target/arm: Convert SHSUB, UHSUB to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,56/67] target/arm: Convert SHSUB, UHSUB to gvec target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,55/67] target/arm: Convert SHADD, UHADD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,54/67] target/arm: Convert SHADD, UHADD to gvec target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,53/67] target/arm: Use TCG_COND_TSTNE in gen_cmtst_vec target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,52/67] target/arm: Use TCG_COND_TSTNE in gen_cmtst_{i32, i64} target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,51/67] target/arm: Convert CMGT, CMHI, CMGE, CMHS, CMTST, CMEQ to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,50/67] target/arm: Convert ADD, SUB (vector) to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,49/67] target/arm: Convert SQRSHL, UQRSHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,48/67] target/arm: Convert SQRSHL and UQRSHL (register) to gvec target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,47/67] target/arm: Convert SQSHL, UQSHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,46/67] target/arm: Convert SQSHL and UQSHL (register) to gvec target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,45/67] target/arm: Convert SRSHL, URSHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,44/67] target/arm: Convert SRSHL and URSHL (register) to gvec target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,43/67] target/arm: Convert SSHL, USHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,42/67] target/arm: Convert SUQADD, USQADD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,41/67] target/arm: Convert SQADD, SQSUB, UQADD, UQSUB to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,40/67] target/arm: Inline scalar SQADD, UQADD, SQSUB, UQSUB target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,39/67] target/arm: Inline scalar SUQADD and USQADD target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,38/67] target/arm: Convert SUQADD and USQADD to gvec target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,37/67] target/arm: Improve vector UQADD, UQSUB, SQADD, SQSUB target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,36/67] target/arm: Convert disas_simd_3same_logic to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,35/67] target/arm: Convert FMLAL, FMLSL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,34/67] target/arm: Use gvec for neon pmax, pmin target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,33/67] target/arm: Convert SMAXP, SMINP, UMAXP, UMINP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,32/67] target/arm: Use gvec for neon padd target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,31/67] target/arm: Convert ADDP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,30/67] target/arm: Use gvec for neon faddp, fmaxp, fminp target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,29/67] target/arm: Convert FMAXP, FMINP, FMAXNMP, FMINNMP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,28/67] target/arm: Convert FADDP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,27/67] target/arm: Convert FRECPS, FRSQRTS to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,26/67] target/arm: Convert FABD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,25/67] target/arm: Convert FCMEQ, FCMGE, FCMGT, FACGE, FACGT to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,24/67] target/arm: Convert FMLA, FMLS to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,23/67] target/arm: Convert FNMUL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,22/67] target/arm: Expand vfp neg and abs inline target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,21/67] target/arm: Introduce vfp_load_reg16 target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-24 Richard Henderson New
[v2,20/67] target/arm: Convert FMAX, FMIN, FMAXNM, FMINNM to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,19/67] target/arm: Convert FADD, FSUB, FDIV, FMUL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,18/67] target/arm: Convert FMULX to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,17/67] target/arm: Convert Advanced SIMD copy to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,16/67] target/arm: Convert XAR to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,15/67] target/arm: Convert Cryptographic 3-register, imm2 to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,14/67] target/arm: Convert Cryptographic 4-register to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,13/67] target/arm: Convert Cryptographic 2-register SHA512 to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,12/67] target/arm: Convert Cryptographic 3-register SHA512 to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,11/67] target/arm: Convert Cryptographic 2-register SHA to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,10/67] target/arm: Convert Cryptographic 3-register SHA to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,09/67] target/arm: Convert Cryptographic AES to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - 1 - --- 2024-05-24 Richard Henderson New
[v2,08/67] target/arm: Split out gengvec64.c target/arm: Convert a64 advsimd to decodetree (part 1) - - 2 - --- 2024-05-24 Richard Henderson New
[v2,07/67] target/arm: Split out gengvec.c target/arm: Convert a64 advsimd to decodetree (part 1) - - 2 - --- 2024-05-24 Richard Henderson New
[v2,06/67] target/arm: Verify sz=0 for Advanced SIMD scalar pairwise (fp16) target/arm: Convert a64 advsimd to decodetree (part 1) - 1 - - --- 2024-05-24 Richard Henderson New
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