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Apply
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Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
[PULL,00/85] target/hppa patch queue
- - - -
-
-
-
2023-11-07
Richard Henderson
New
[35/35] tcg/sparc64: Implement tcg_out_extrl_i64_i32
[01/35] accel/tcg: Move HMP info jit and info opcount code
- 1 1 -
-
-
-
2023-11-07
Richard Henderson
New
[34/35] tcg/optimize: Canonicalize sub2 with constants to add2
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - 1 -
-
-
-
2023-11-07
Richard Henderson
New
[33/35] tcg/optimize: Canonicalize subi to addi during optimization
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - 1 -
-
-
-
2023-11-07
Richard Henderson
New
[32/35] tcg: Canonicalize subi to addi during opcode generation
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - 1 -
-
-
-
2023-11-07
Richard Henderson
New
[31/35] tcg/optimize: Split out arg_new_constant
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - 1 -
-
-
-
2023-11-07
Richard Henderson
New
[30/35] tcg: Eliminate duplicate env store operations
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - 1 -
-
-
-
2023-11-07
Richard Henderson
New
[29/35] tcg/optimize: Optimize env memory operations
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - 1 -
-
-
-
2023-11-07
Richard Henderson
New
[28/35] tcg/optimize: Split out cmp_better_copy
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - - -
-
-
-
2023-11-07
Richard Henderson
New
[27/35] tcg/optimize: Pipe OptContext into reset_ts
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - 2 -
-
-
-
2023-11-07
Richard Henderson
New
[26/35] tcg: Don't free vector results
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - 1 -
-
-
-
2023-11-07
Richard Henderson
New
[25/35] tcg: Remove TCG_TARGET_HAS_neg_{i32,i64}
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - - -
-
-
-
2023-11-07
Richard Henderson
New
[24/35] tcg/loongarch64: Implement neg opcodes
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - - -
-
-
-
2023-11-07
Richard Henderson
New
[23/35] tcg/mips: Implement neg opcodes
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - - -
-
-
-
2023-11-07
Richard Henderson
New
[22/35] tcg: Remove TCG_TARGET_HAS_movcond_{i32,i64}
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - - -
-
-
-
2023-11-07
Richard Henderson
New
[21/35] tcg/mips: Always implement movcond
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - - -
-
-
-
2023-11-07
Richard Henderson
New
[20/35] tcg/mips: Split out tcg_out_setcond_int
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - - -
-
-
-
2023-11-07
Richard Henderson
New
[19/35] tcg: Move tcg_temp_free_* out of line
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - - -
-
-
-
2023-11-07
Richard Henderson
New
[18/35] tcg: Move tcg_temp_new_*, tcg_global_mem_new_* out of line
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - - -
-
-
-
2023-11-07
Richard Henderson
New
[17/35] tcg: Move tcg_constant_* out of line
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - - -
-
-
-
2023-11-07
Richard Henderson
New
[16/35] tcg: Unexport tcg_gen_op*_{i32,i64}
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - - -
-
-
-
2023-11-07
Richard Henderson
New
[15/35] tcg: Move tcg_gen_opN declarations to tcg-internal.h
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - - -
-
-
-
2023-11-07
Richard Henderson
New
[14/35] tcg: Move vec_gen_* declarations to tcg-internal.h
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - - -
-
-
-
2023-11-07
Richard Henderson
New
[13/35] tcg: Move 64-bit expanders out of line
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - - -
-
-
-
2023-11-07
Richard Henderson
New
[12/35] tcg: Move 32-bit expanders out of line
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - - -
-
-
-
2023-11-07
Richard Henderson
New
[11/35] tcg: Move generic expanders out of line
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - - -
-
-
-
2023-11-07
Richard Henderson
New
[10/35] tcg: Move tcg_gen_op* out of line
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - - -
-
-
-
2023-11-07
Richard Henderson
New
[09/35] tcg: Mark tcg_gen_op* as noinline
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - - -
-
-
-
2023-11-07
Richard Henderson
New
[08/35] accel/tcg: Fix condition for store_atom_insert_al16
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - - -
-
-
-
2023-11-07
Richard Henderson
New
[07/35] accel/tcg: Remove redundant case in store_atom_16
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - - -
-
-
-
2023-11-07
Richard Henderson
New
[06/35] host/include/loongarch64: Add atomic16 load and store
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - - -
-
-
-
2023-11-07
Richard Henderson
New
[05/35] tcg/loongarch64: Use cpuinfo.h
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - 1 -
-
-
-
2023-11-07
Richard Henderson
New
[04/35] util: Add cpuinfo for loongarch64
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - 1 -
-
-
-
2023-11-07
Richard Henderson
New
[03/35] tcg/loongarch64: Use C_N2_I1 for INDEX_op_qemu_ld_a*_i128
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - 1 -
-
-
-
2023-11-07
Richard Henderson
New
[02/35] tcg: Add C_N2_I1
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - 1 -
-
-
-
2023-11-07
Richard Henderson
New
[01/35] accel/tcg: Move HMP info jit and info opcount code
[01/35] accel/tcg: Move HMP info jit and info opcount code
- - 2 1
-
-
-
2023-11-07
Richard Henderson
New
[00/35] tcg patch queue
- - - -
-
-
-
2023-11-07
Richard Henderson
New
dump:Add close fd on error return to avoid resource leak
dump:Add close fd on error return to avoid resource leak
- 1 2 -
-
-
-
2023-11-07
Zongmin Zhou
New
[PULL,49/49] docs/about/deprecated: Document RISC-V "pmu-num" deprecation
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
1 - 2 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,48/49] target/riscv: Add "pmu-mask" property to replace "pmu-num"
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,47/49] target/riscv: Use existing PMU counter mask in FDT generation
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 3 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,46/49] target/riscv: Don't assume PMU counters are continuous
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 3 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,45/49] target/riscv: Propagate error from PMU setup
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 3 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,44/49] target/riscv: cpu: Set the OpenTitan priv to 1.12.0
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,43/49] hw/ssi: ibex_spi_host: Clear the interrupt even if disabled
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,42/49] disas/riscv: Replace TABs with space
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
1 - - -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,41/49] disas/riscv: Add support for vector crypto extensions
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - - -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,40/49] disas/riscv: Add rv_codec_vror_vi for vror.vi
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
1 - - -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,39/49] disas/riscv: Add rv_fmt_vd_vs2_uimm format
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
1 - - -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,38/49] target/riscv: Move vector crypto extensions to riscv_cpu_extensions
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
1 - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,37/49] target/riscv: Expose Zvks[c|g] extnesion properties
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
1 - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,36/49] target/riscv: Add cfg properties for Zvks[c|g] extensions
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
1 - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,35/49] target/riscv: Expose Zvkn[c|g] extnesion properties
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
1 - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,34/49] target/riscv: Add cfg properties for Zvkn[c|g] extensions
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
1 - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,33/49] target/riscv: Expose Zvkb extension property
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
1 - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,32/49] target/riscv: Replace Zvbb checking by Zvkb
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,31/49] target/riscv: Add cfg property for Zvkb extension
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
1 - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,30/49] target/riscv: Expose Zvkt extension property
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
1 - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,29/49] target/riscv: Add cfg property for Zvkt extension
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
1 - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,28/49] MAINTAINERS: update mail address for Weiwei Li
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 4 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,27/49] target/riscv: correct csr_ops[CSR_MSECCFG]
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- 1 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,26/49] target/riscv/kvm: add zicsr, zifencei, zba, zbs, svnapot
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
1 - - -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,25/49] target/riscv/kvm: add zihpm reg
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,24/49] target/riscv: add zihpm extension flag for TCG
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,23/49] target/riscv/kvm: add zicntr reg
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,22/49] target/riscv: add zicntr extension flag for TCG
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,21/49] target/riscv: pmp: Ignore writes when RW=01
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,20/49] target/riscv: pmp: Clear pmp/smepmp bits on reset
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,19/49] Add epmp to extensions list and rename it to smepmp
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 2 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,18/49] target/riscv/riscv-qmp-cmds.c: check CPU accel in query-cpu-model-expansion
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,17/49] target/riscv: add riscv_cpu_accelerator_compatible()
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,16/49] target/riscv: handle custom props in qmp_query_cpu_model_expansion
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,15/49] target/riscv/tcg: add tcg_cpu_finalize_features()
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,14/49] qapi,risc-v: add query-cpu-model-expansion
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,13/49] target/riscv/kvm/kvm-cpu.c: add missing property getters()
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,12/49] docs/system/riscv: update 'virt' machine core limit
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,11/49] linux-user/riscv: change default cpu to 'max'
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- 1 3 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,10/49] target/riscv: Add HS-mode virtual interrupt and IRQ filtering support.
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,09/49] target/riscv: Add M-mode virtual interrupt and IRQ filtering support.
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,08/49] target/riscv: Split interrupt logic from riscv_cpu_update_mip.
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,07/49] target/riscv: Set VS* bits to one in mideleg when H-Ext is enabled
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,06/49] target/riscv: Check for async flag in case of RISCV_EXCP_SEMIHOST.
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,05/49] target/riscv: Without H-mode mask all HS mode inturrupts in mie.
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 1 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,04/49] target/riscv: rename ext_icboz to ext_zicboz
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 2 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,03/49] target/riscv: rename ext_icbom to ext_zicbom
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 2 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,02/49] target/riscv: rename ext_icsr to ext_zicsr
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 2 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
[PULL,01/49] target/riscv: rename ext_ifencei to ext_zifencei
- - 2 -
-
-
-
2023-11-07
Alistair Francis
New
[PULL,00/49] riscv-to-apply queue
- - - -
-
-
-
2023-11-07
Alistair Francis
New
[v5,2/2] migration: prevent migration when a poisoned page is unknown from the VM
Qemu crashes on VM migration after an handled memory error
- - - -
-
-
-
2023-11-06
“William Roche
New
[v5,1/2] migration: skip poisoned memory pages on "ram saving" phase
Qemu crashes on VM migration after an handled memory error
- - 1 1
-
-
-
2023-11-06
“William Roche
New
[for-8.3,v2,46/46] net: make nb_nics and nd_table[] static in net/net.c
Rework matching of network devices to -nic options
- - - -
-
-
-
2023-11-06
David Woodhouse
New
[for-8.3,v2,45/46] net: remove qemu_show_nic_models(), qemu_find_nic_model()
Rework matching of network devices to -nic options
- - - -
-
-
-
2023-11-06
David Woodhouse
New
[for-8.3,v2,44/46] hw/pci: remove pci_nic_init_nofail()
Rework matching of network devices to -nic options
- - - -
-
-
-
2023-11-06
David Woodhouse
New
[for-8.3,v2,43/46] net: remove qemu_check_nic_model()
Rework matching of network devices to -nic options
- - - -
-
-
-
2023-11-06
David Woodhouse
New
[for-8.3,v2,42/46] hw/xtensa/xtfpga: use qemu_create_nic_device()
Rework matching of network devices to -nic options
- - - -
-
-
-
2023-11-06
David Woodhouse
New
[for-8.3,v2,41/46] hw/sparc/sun4m: use qemu_find_nic_info()
Rework matching of network devices to -nic options
- - - -
-
-
-
2023-11-06
David Woodhouse
New
[for-8.3,v2,40/46] hw/s390x/s390-virtio-ccw: use qemu_create_nic_device()
Rework matching of network devices to -nic options
- - - -
-
-
-
2023-11-06
David Woodhouse
New
[for-8.3,v2,39/46] hw/riscv: use qemu_configure_nic_device()
Rework matching of network devices to -nic options
- - - -
-
-
-
2023-11-06
David Woodhouse
New
[for-8.3,v2,38/46] hw/openrisc/openrisc_sim: use qemu_create_nic_device()
Rework matching of network devices to -nic options
- - - -
-
-
-
2023-11-06
David Woodhouse
New
[for-8.3,v2,37/46] hw/net/lasi_i82596: use qemu_configure_nic_device()
Rework matching of network devices to -nic options
- - - -
-
-
-
2023-11-06
David Woodhouse
New
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