Show patches with: State = Action Required       |    Archived = No       |   521132 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[PULL,30/52] target/riscv: add sdext enter Debug Mode on ebreak [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates - - 3 1 --- 2026-10-14 Alistair Francis New
[PULL,29/52] target/riscv: add dret instruction [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates - - 3 1 --- 2026-10-14 Alistair Francis New
[PULL,28/52] target/riscv: add sdext Debug Mode helpers [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates - - 2 1 --- 2026-10-14 Alistair Francis New
[PULL,27/52] target/riscv: add sdext debug CSRs state [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates 1 - 2 1 --- 2026-10-14 Alistair Francis New
[PULL,26/52] target/riscv: Access MIP atomically [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates - - 2 - --- 2026-10-14 Alistair Francis New
[PULL,25/52] target/riscv: Add riscv_cpu_get_mip() [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates - - 1 - --- 2026-10-14 Alistair Francis New
[PULL,24/52] target/riscv: Have riscv_cpu_set_mode() call riscv_cpu_interrupt() [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates - - 1 - --- 2026-10-14 Alistair Francis New
[PULL,23/52] target/riscv: Clarify riscv_accel_set_irq() arguments [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates - - 1 - --- 2026-10-14 Alistair Francis New
[PULL,22/52] target/riscv: Document kvm_riscv_set_irq() [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates - - 1 - --- 2026-10-14 Alistair Francis New
[PULL,21/52] target/riscv: Document riscv_cpu_update_mip() [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates - - 1 - --- 2026-10-14 Alistair Francis New
[PULL,20/52] docs/system/riscv: Add Milk-V Duo board documentation [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates 1 - - - --- 2026-10-14 Alistair Francis New
[PULL,19/52] tests/functional/riscv64: Add boot test for Milk-V Duo board [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates - - - - --- 2026-10-14 Alistair Francis New
[PULL,18/52] tests/qtest: Add qtest for Milk-V Duo board [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates 1 - - - --- 2026-10-14 Alistair Francis New
[PULL,17/52] hw/riscv: Add Milk-V Duo board support [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates 1 - 1 - --- 2026-10-14 Alistair Francis New
[PULL,16/52] hw/riscv: Add Sophgo CV1800B SoC support [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates 1 - - - --- 2026-10-14 Alistair Francis New
[PULL,15/52] hw/misc: Add Sophgo CV1800B clock controller [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates 1 - - - --- 2026-10-14 Alistair Francis New
[PULL,14/52] hw/char: Add dw8250 UART [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates - - 2 - --- 2026-10-14 Alistair Francis New
[PULL,13/52] tests/tcg/riscv64: Add Zvabd extension tests [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates - - 1 - --- 2026-10-14 Alistair Francis New
[PULL,12/52] disas/riscv: Support vabs.v pseudo-instruction [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates - - 1 - --- 2026-10-14 Alistair Francis New
[PULL,11/52] target/riscv: Add support for the Zvabd extension [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates - - 3 - --- 2026-10-14 Alistair Francis New
[PULL,10/52] target/riscv: save ELP in MPELP for NMIE=0 exceptions [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates - 1 1 - --- 2026-10-14 Alistair Francis New
[PULL,09/52] target/riscv/kvm: Preserve VCSR across migration [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates - 1 1 - --- 2026-10-14 Alistair Francis New
[PULL,08/52] target/riscv/kvm: Reject migration with a different timer frequency [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates - 1 1 - --- 2026-10-14 Alistair Francis New
[PULL,07/52] target/riscv/kvm: Preserve FCSR across migration [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates - 2 1 - --- 2026-10-14 Alistair Francis New
[PULL,06/52] target/riscv: report WRS.NTO opcode in tval on illegal instruction [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates - 1 1 - --- 2026-10-14 Alistair Francis New
[PULL,05/52] targetriscv: svinval instructions raise virtual instruction exception [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates - - 1 - --- 2026-10-14 Alistair Francis New
[PULL,04/52] target/riscv: stop translating after WFI [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates - 1 1 - --- 2026-10-14 Alistair Francis New
[PULL,03/52] disas/riscv: Fix csrrs decode [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates - 1 1 - --- 2026-10-14 Alistair Francis New
[PULL,02/52] target/riscv: Restore LCOFI handling in interrupt CSRs [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates - 1 1 - --- 2026-10-14 Alistair Francis New
[PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates [PULL,01/52] target/riscv: check G-stage write permission for VS-stage A/D updates - - 1 - --- 2026-10-14 Alistair Francis New
[PULL,00/52] riscv-to-apply queue - - - - --- 2026-10-14 Alistair Francis New
block/bochs: validate bitmap size and compute extent_blocks after validation block/bochs: validate bitmap size and compute extent_blocks after validation - 1 - - --- 2026-10-14 malike New
[v4,3/3] docs/atlantis: Update Atlantis UART documentation Improve modeling of the Atlantis UART - - 1 - --- 2026-10-14 Portia Stephens New
[v4,2/3] hw/riscv/atlantis: Add all UARTs for Atlantis SoC Improve modeling of the Atlantis UART - - 2 - --- 2026-10-14 Portia Stephens New
[v4,1/3] hw/riscv/atlantis: Use dw8250 UART model Improve modeling of the Atlantis UART - - 2 - --- 2026-10-14 Portia Stephens New
[v4,27/27] MAINTAINERS: Move Conor Dooley to PolarFire SoC reviewer hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot 1 - - - --- 2026-10-14 Bin Meng New
[v4,26/27] MAINTAINERS: Add PolarFire SoC Icicle Kit maintainer hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot 1 - 1 - --- 2026-10-14 Bin Meng New
[v4,25/27] tests/functional/riscv64: Add Icicle Kit firmware boot test hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot - - 1 - --- 2026-10-14 Bin Meng New
[v4,24/27] docs/system/riscv: pfsoc: Document CLINT topology for direct Linux boot hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot - - - - --- 2026-10-14 Bin Meng New
[v4,23/27] docs/system/riscv: Document Icicle Kit HSS boot hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot - - - - --- 2026-10-14 Bin Meng New
[v4,22/27] hw/riscv: pfsoc: Default Icicle Kit to five harts hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot - - - 1 --- 2026-10-14 Bin Meng New
[v4,21/27] hw/riscv: pfsoc: Fix Icicle Kit RAM size at 2 GiB hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot - - 2 1 --- 2026-10-14 Bin Meng New
[v4,20/27] hw/riscv: pfsoc: Correct PolarFire SoC DDR aliases hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot - - 1 1 --- 2026-10-14 Bin Meng New
[v4,19/27] hw/misc: pfsoc: Let IOSCB own service interrupt state hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot - - - 1 --- 2026-10-14 Bin Meng New
[v4,18/27] hw/misc: pfsoc: Honor service notification requests hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot - 1 - 1 --- 2026-10-14 Bin Meng New
[v4,17/27] hw/misc: pfsoc: Model PolarFire SoC serial number service hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot - - - 1 --- 2026-10-14 Bin Meng New
[v4,16/27] tests/qtest: Add PolarFire SoC RTC coverage hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot - - - - --- 2026-10-14 Bin Meng New
[v4,15/27] hw/riscv: pfsoc: Add PolarFire SoC RTC to Icicle Kit hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot - - 1 1 --- 2026-10-14 Bin Meng New
[v4,14/27] hw/rtc: Add PolarFire SoC RTC model hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot - - - 1 --- 2026-10-14 Bin Meng New
[v4,13/27] hw/riscv: pfsoc: Enable 64-bit SDHCI system bus support hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot - - - 1 --- 2026-10-14 Bin Meng New
[v4,12/27] hw/sd: cadence: Add 64-bit system bus property hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot - - - 1 --- 2026-10-14 Bin Meng New
[v4,11/27] hw/sd: sd: Keep high-capacity memory blocks at 512 bytes hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot - 1 1 1 --- 2026-10-14 Bin Meng New
[v4,10/27] tests/qtest: add Cadence SDHCI ADMA pacing/MMIO reproducer hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot - - - - --- 2026-10-14 Bin Meng New
[v4,09/27] hw/sd: sdhci: Run ADMA independently of MMIO hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot - - - 2 --- 2026-10-14 Bin Meng New
[v4,08/27] tests/qtest: Add SiFive L2 cache controller coverage hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot - - - - --- 2026-10-14 Bin Meng New
[v4,07/27] hw/riscv: sifive_u: Use the shared SiFive L2 cache controller hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot - - - - --- 2026-10-14 Bin Meng New
[v4,06/27] hw/riscv: sifive_u: Correct the L2LIM maximum mapped size hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot - - - 1 --- 2026-10-14 Bin Meng New
[v4,05/27] hw/riscv: pfsoc: Map the SiFive L2CC memory windows hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot - - - 1 --- 2026-10-14 Bin Meng New
[v4,04/27] hw/misc: Add SiFive L2 cache controller model hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot - - - 1 --- 2026-10-14 Bin Meng New
[v4,03/27] hw/misc: pfsoc: Support DDR training with newer HSS hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot - - - 1 --- 2026-10-14 Bin Meng New
[v4,02/27] hw/riscv: pfsoc: Map the L2 zero device window hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot 1 - 1 1 --- 2026-10-14 Bin Meng New
[v4,01/27] hw/riscv: pfsoc: Correct the L2LIM maximum mapped size hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot 1 - 1 1 --- 2026-10-14 Bin Meng New
[v3,3/3] scripts: add generate_release_wrappers.sh releases: build and run any QEMU release easily! - - - - --- 2026-10-14 Pierrick Bouvier New
[v3,2/3] scripts: add build_release_container.sh releases: build and run any QEMU release easily! - - - - --- 2026-10-14 Pierrick Bouvier New
[v3,1/3] tests/docker/dockerfiles: add release.docker releases: build and run any QEMU release easily! - - - - --- 2026-10-14 Pierrick Bouvier New
[v3,2/2] util/coroutine: Reduce default idle pool max size util/coroutine: Reduce default idle pool max size - 1 - - --- 2026-10-13 Wesley Hershberger New
[v3,1/2] util/coroutine: trim sysctl's max_map_count newline before parsing util/coroutine: Reduce default idle pool max size - 1 1 - --- 2026-10-13 Wesley Hershberger New
[3/3] hw/virtio/virtio-mem: Avoid call to target_info() in class_init hw/(pci/scsi/virtio-mem): Avoid call to target_info() in class_init - - - - --- 2026-10-13 Yonggang Luo New
[2/3] hw/scsi: Avoid guard loadparm with target_s390x() for s390x in class_init hw/(pci/scsi/virtio-mem): Avoid call to target_info() in class_init - - - - --- 2026-10-13 Yonggang Luo New
[1/3] hw/pci: Avoid guard loadparm with target_s390x() for s390x in class_init hw/(pci/scsi/virtio-mem): Avoid call to target_info() in class_init - - - - --- 2026-10-13 Yonggang Luo New
hw/microblaze: defer PetaLogix endianness default until init hw/microblaze: defer PetaLogix endianness default until init - - - - --- 2026-10-13 Yonggang Luo New
target/arm: defer max-v8 initializer selection until CPU creation target/arm: defer max-v8 initializer selection until CPU creation - - - - --- 2026-10-13 Yonggang Luo New
dmg: avoid out-of-bounds memory load in dmg_read_mish_block() dmg: avoid out-of-bounds memory load in dmg_read_mish_block() - 1 1 - --- 2026-10-13 Stefan Hajnoczi New
[PULL,5/5] tests/functional: Boot OpenBSD on mac99 [PULL,1/5] openpic: Preserve IRQs masked by CTPR - - 1 2 --- 2026-10-13 Mark Cave-Ayland New
[PULL,4/5] cuda: Make shift register delay configurable [PULL,1/5] openpic: Preserve IRQs masked by CTPR - - 1 2 --- 2026-10-13 Mark Cave-Ayland New
[PULL,3/5] cuda: Include command in successful ADB replies [PULL,1/5] openpic: Preserve IRQs masked by CTPR - - 1 2 --- 2026-10-13 Mark Cave-Ayland New
[PULL,2/5] ppc: Raise decrementer IRQ on zero write [PULL,1/5] openpic: Preserve IRQs masked by CTPR - - 2 2 --- 2026-10-13 Mark Cave-Ayland New
[PULL,1/5] openpic: Preserve IRQs masked by CTPR [PULL,1/5] openpic: Preserve IRQs masked by CTPR - - 2 2 --- 2026-10-13 Mark Cave-Ayland New
[PULL,0/5] qemu-macppc queue 20261013 - - - - --- 2026-10-13 Mark Cave-Ayland New
[PULL,1/1] tests/tcg/riscv64: remove forgotten Makefile.softmmu-target [PULL,1/1] tests/tcg/riscv64: remove forgotten Makefile.softmmu-target - 1 1 - --- 2026-10-13 Pierrick Bouvier New
[PULL,0/1] tcg tests 20261013 - - - - --- 2026-10-13 Pierrick Bouvier New
iotests/108: probe loop device setup iotests/108: probe loop device setup - - 1 - --- 2026-10-13 Ilya Leoshkevich New
[v2,8/8] scsi: use REGISTER AND IGNORE EXISTING KEY for robustness scsi: clean up persistent reservation state after migration - - 1 - --- 2026-10-13 Stefan Hajnoczi New
[v2,7/8] scsi: clean up persistent reservation state after migration scsi: clean up persistent reservation state after migration - - 1 - --- 2026-10-13 Stefan Hajnoczi New
[v2,6/8] file-posix: forward PR_HELPER_CLEANUP commands to pr-manager scsi: clean up persistent reservation state after migration - - 1 - --- 2026-10-13 Stefan Hajnoczi New
[v2,5/8] pr-manager-helper: add PR_HELPER_CLEANUP command support scsi: clean up persistent reservation state after migration - - 1 - --- 2026-10-13 Stefan Hajnoczi New
[v2,4/8] qemu-pr-helper: add PR_HELPER_CLEANUP for live migration scsi: clean up persistent reservation state after migration - - 1 - --- 2026-10-13 Stefan Hajnoczi New
[v2,3/8] hw/scsi-disk: move MIG_EVENT_FAILED into a new function scsi: clean up persistent reservation state after migration - - 1 - --- 2026-10-13 Stefan Hajnoczi New
[v2,2/8] scsi: increase sense buffer size in scsi_SG_IO() scsi: clean up persistent reservation state after migration - - 1 - --- 2026-10-13 Stefan Hajnoczi New
[v2,1/8] pr-manager-helper: fix sense buffer overflow scsi: clean up persistent reservation state after migration - 1 1 - --- 2026-10-13 Stefan Hajnoczi New
[v2,2/2] util/coroutine: Reduce default idle pool max size util/coroutine: Reduce default idle pool max size - 1 - - --- 2026-10-13 Wesley Hershberger New
[v2,1/2] util/coroutine: trim sysctl's max_map_count newline before parsing util/coroutine: Reduce default idle pool max size - 1 1 - --- 2026-10-13 Wesley Hershberger New
util/coroutine: Reduce default idle pool max size util/coroutine: Reduce default idle pool max size - 1 - - --- 2026-10-13 Wesley Hershberger New
[v3] .claude: delete obsolete/redundant link to AGENTS.md [v3] .claude: delete obsolete/redundant link to AGENTS.md - - - - --- 2026-10-13 Daniel P. Berrangé New
.skills: fix broken links from .claude/.gemini dirs .skills: fix broken links from .claude/.gemini dirs - 1 - - --- 2026-10-13 Daniel P. Berrangé New
[4/4] Revert "crypto: implement workaround for GNUTLS thread safety problems" Revert obsolete & broken workaround for GNUTLS thread safety bug - - - - --- 2026-10-13 Daniel P. Berrangé New
[3/4] Revert "crypto: add tracing & warning about GNUTLS countermeasures" Revert obsolete & broken workaround for GNUTLS thread safety bug - - - - --- 2026-10-13 Daniel P. Berrangé New
[2/4] Revert "io: add support for activating TLS thread safety workaround" Revert obsolete & broken workaround for GNUTLS thread safety bug - - - - --- 2026-10-13 Daniel P. Berrangé New
[1/4] Revert "migration: activate TLS thread safety workaround" Revert obsolete & broken workaround for GNUTLS thread safety bug - - - - --- 2026-10-13 Daniel P. Berrangé New
[GIT,PULL,40/40] chardev/char: fix use-after-free on mux creation failure Untitled series #527741 - 1 - - --- 2026-10-13 Marc-André Lureau New
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