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[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
| 26 patches
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Apply
Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
[v2,28/28] riscv: sifive_u: Update model and compatible strings in device tree
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
- - 1 -
-
-
-
2019-08-07
Bin Meng
Superseded
[v2,27/28] riscv: virt: Change create_fdt() to return void
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
- - 2 -
-
-
-
2019-08-07
Bin Meng
Superseded
[v2,25/28] riscv: hw: Remove not needed PLIC properties in device tree
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
- - 1 -
-
-
-
2019-08-07
Bin Meng
Superseded
[v2,24/28] riscv: sifive_u: Support loading initramfs
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
- - 1 -
-
-
-
2019-08-07
Bin Meng
Superseded
[v2,23/28] riscv: sifive_u: Fix broken GEM support
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
- - - -
-
-
-
2019-08-07
Bin Meng
Superseded
[v2,22/28] riscv: sifive_u: Generate an aliases node in the device tree
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
- - - -
-
-
-
2019-08-07
Bin Meng
Superseded
[v2,21/28] riscv: sifive_u: Update UART and ethernet node clock properties
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
- - - -
-
-
-
2019-08-07
Bin Meng
Superseded
[v2,19/28] riscv: sifive_u: Instantiate OTP memory with a serial number
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
- - - -
-
-
-
2019-08-07
Bin Meng
Superseded
[v2,18/28] riscv: hw: Implement a model for SiFive FU540 OTP
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
- - - -
-
-
-
2019-08-07
Bin Meng
Superseded
[v2,17/28] riscv: sifive_u: Change UART node name in device tree
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
- - 1 -
-
-
-
2019-08-07
Bin Meng
Superseded
[v2,16/28] riscv: sifive_u: Add PRCI block to the SoC
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
- - - -
-
-
-
2019-08-07
Bin Meng
Superseded
[v2,15/28] riscv: sifive_u: Generate hfclk and rtcclk nodes
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
- - - -
-
-
-
2019-08-07
Bin Meng
Superseded
[v2,14/28] riscv: sifive: Implement PRCI model for FU540
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
- - - -
-
-
-
2019-08-07
Bin Meng
Superseded
[v2,13/28] riscv: sifive_e: prci: Update the PRCI register block size
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
- - - -
-
-
-
2019-08-07
Bin Meng
Superseded
[v2,12/28] riscv: sifive_e: prci: Fix a typo of hfxosccfg register programming
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
1 - 2 -
-
-
-
2019-08-07
Bin Meng
Superseded
[v2,11/28] riscv: sifive: Rename sifive_prci.{c, h} to sifive_e_prci.{c, h}
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
- - 1 -
-
-
-
2019-08-07
Bin Meng
Superseded
[v2,10/28] riscv: sifive_u: Remove the unnecessary include of prci header
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
- - 1 -
-
-
-
2019-08-07
Bin Meng
Superseded
[v2,09/28] riscv: sifive_u: Update UART base addresses
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
1 - 2 -
-
-
-
2019-08-07
Bin Meng
Superseded
[v2,08/28] riscv: sifive_u: Update PLIC hart topology configuration string
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
- - 1 -
-
-
-
2019-08-07
Bin Meng
Superseded
[v2,07/28] riscv: sifive_u: Set the minimum number of cpus to 2
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
- - - -
-
-
-
2019-08-07
Bin Meng
Superseded
[v2,06/28] riscv: sifive_u: Update hart configuration to reflect the real FU540 SoC
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
- - - -
-
-
-
2019-08-07
Bin Meng
Superseded
[v2,05/28] riscv: hart: Support heterogeneous harts population
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
- - - -
-
-
-
2019-08-07
Bin Meng
Superseded
[v2,04/28] riscv: hart: Extract hart realize to a separate routine
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
- - - -
-
-
-
2019-08-07
Bin Meng
Superseded
[v2,03/28] riscv: Add a sifive_cpu.h to include both E and U cpu type defines
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
- - 2 -
-
-
-
2019-08-07
Bin Meng
Superseded
[v2,02/28] riscv: hw: Use qemu_fdt_setprop_cell() for property with only 1 cell
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
- - 1 -
-
-
-
2019-08-07
Bin Meng
Superseded
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
[v2,01/28] riscv: hw: Remove superfluous "linux, phandle" property
- - 1 -
-
-
-
2019-08-07
Bin Meng
Superseded