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[83.35.24.118]) by smtp.gmail.com with ESMTPSA id c7sm14010374wmq.13.2021.09.25.07.51.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 25 Sep 2021 07:51:19 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH v7 00/40] accel: Move has_work() from CPUClass to AccelOpsClass Date: Sat, 25 Sep 2021 16:50:38 +0200 Message-Id: <20210925145118.1361230-1-f4bug@amsat.org> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x431.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.248, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Hi, CPU has_work() is a per-accelerator handler. This series is organized in 2 parts: - Patches 1-15: Move has_work() from CPUClass to AccelOpsClass - Patches 16-40: Move remainging has_work() to TCGCPUOps I prefer to send as a single big series to be sure it is merged at once, since the 2nd part logic (TCGCPUOps) is related to the end of the first part (we proved remaining CPUClass::has_work handlers are TCG specific, thus can be moved to TCGCPUOps). Missing review: 0001-accel-Simplify-qemu_init_vcpu.patch 0004-hw-core-Move-cpu_common_has_work-to-cpu_has_work.patch 0005-accel-Introduce-AccelOpsClass-has_work.patch 0008-accel-hvf-Implement-AccelOpsClass-has_work.patch 0009-accel-xen-Implement-AccelOpsClass-has_work.patch 0010-accel-hax-Implement-AccelOpsClass-has_work.patch 0011-accel-nvmm-Implement-AccelOpsClass-has_work.patch 0012-accel-qtest-Implement-AccelOpsClass-has_work.patch 0013-accel-tcg-Implement-AccelOpsClass-has_work.patch 0014-accel-Simplify-cpu_has_work.patch 0015-accel-tcg-Introduce-TCGCPUOps-has_work.patch 0016-target-arm-Explicit-v7M-cores-use-arm_cpu_has_work-a.patch 0017-target-arm-Restrict-has_work-handler-to-sysemu-and-T.patch 0018-target-alpha-Restrict-has_work-handler-to-sysemu.patch 0039-accel-tcg-Remove-CPUClass-has_work.patch 0040-accel-tcg-Simplify-tcg_cpu_has_work.patch Since v6: - Added missing target/alpha/ patch - Updated comment in qemu_s390_flic_has_service() Since v5: - Rework ARM v7M case (pm215) - Reorder patch logic (rth) Since v4: - Implement arm_v7m_cpu_has_work() (new patch) - Assert has_work() handlers are set, don't use default value - Fix ARM v7M and cris CPUs - Reset R-b tags on modified patches Since v3: - Remove pointless CONFIG_TCG uses (rth) - Rework PPC patches, still using indirection Since v2: - Full rewrite, no more RFC. Supersedes: <20210920214447.2998623-1-f4bug@amsat.org> Philippe Mathieu-Daudé (40): accel: Simplify qemu_init_vcpu() hw/core: Restrict cpu_has_work() to sysemu hw/core: Un-inline cpu_has_work() hw/core: Move cpu_common_has_work() to cpu_has_work() accel: Introduce AccelOpsClass::has_work() accel/kvm: Implement AccelOpsClass::has_work() accel/whpx: Implement AccelOpsClass::has_work() accel/hvf: Implement AccelOpsClass::has_work() accel/xen: Implement AccelOpsClass::has_work() accel/hax: Implement AccelOpsClass::has_work() accel/nvmm: Implement AccelOpsClass::has_work() accel/qtest: Implement AccelOpsClass::has_work() accel/tcg: Implement AccelOpsClass::has_work() accel: Simplify cpu_has_work() accel/tcg: Introduce TCGCPUOps::has_work() target/arm: Explicit v7M cores use arm_cpu_has_work as CPUClass:has_work target/arm: Restrict has_work() handler to sysemu and TCG target/alpha: Restrict has_work() handler to sysemu target/avr: Restrict has_work() handler to sysemu target/cris: Restrict has_work() handler to sysemu target/hexagon: Remove unused has_work() handler target/hppa: Restrict has_work() handler to sysemu target/i386: Restrict has_work() handler to sysemu and TCG target/m68k: Restrict has_work() handler to sysemu target/microblaze: Restrict has_work() handler to sysemu target/mips: Restrict has_work() handler to sysemu and TCG target/nios2: Restrict has_work() handler to sysemu target/openrisc: Restrict has_work() handler to sysemu target/ppc: Introduce PowerPCCPUClass::has_work() target/ppc: Restrict has_work() handlers to sysemu and TCG target/riscv: Restrict has_work() handler to sysemu and TCG target/rx: Restrict has_work() handler to sysemu target/s390x: Restrict has_work() handler to sysemu and TCG target/sh4: Restrict has_work() handler to sysemu target/sparc: Remove pointless use of CONFIG_TCG definition target/sparc: Restrict has_work() handler to sysemu target/tricore: Restrict has_work() handler to sysemu target/xtensa: Restrict has_work() handler to sysemu accel/tcg: Remove CPUClass::has_work() accel/tcg: Simplify tcg_cpu_has_work() include/hw/core/cpu.h | 28 +++++++++-------------- include/hw/core/tcg-cpu-ops.h | 4 ++++ include/sysemu/accel-ops.h | 5 +++++ target/arm/internals.h | 4 ++++ target/ppc/cpu-qom.h | 3 +++ accel/hvf/hvf-accel-ops.c | 6 +++++ accel/kvm/kvm-accel-ops.c | 6 +++++ accel/qtest/qtest.c | 6 +++++ accel/tcg/cpu-exec.c | 6 +++++ accel/tcg/tcg-accel-ops.c | 9 ++++++++ accel/xen/xen-all.c | 6 +++++ hw/core/cpu-common.c | 6 ----- hw/intc/s390_flic.c | 15 ++++++++++--- softmmu/cpus.c | 17 +++++++++----- target/alpha/cpu.c | 4 +++- target/arm/cpu.c | 9 +++++--- target/arm/cpu_tcg.c | 1 + target/avr/cpu.c | 2 +- target/cris/cpu.c | 5 ++++- target/hexagon/cpu.c | 6 ----- target/hppa/cpu.c | 4 +++- target/i386/cpu.c | 6 ----- target/i386/hax/hax-accel-ops.c | 6 +++++ target/i386/nvmm/nvmm-accel-ops.c | 6 +++++ target/i386/tcg/tcg-cpu.c | 8 ++++++- target/i386/whpx/whpx-accel-ops.c | 6 +++++ target/m68k/cpu.c | 4 +++- target/microblaze/cpu.c | 8 +++---- target/mips/cpu.c | 4 +++- target/nios2/cpu.c | 4 +++- target/openrisc/cpu.c | 4 +++- target/ppc/cpu_init.c | 37 ++++++++++++++++++++++--------- target/riscv/cpu.c | 8 +++---- target/rx/cpu.c | 4 +++- target/s390x/cpu.c | 4 +++- target/sh4/cpu.c | 5 +++-- target/sparc/cpu.c | 6 ++--- target/tricore/cpu.c | 6 ++++- target/xtensa/cpu.c | 14 ++++++------ 39 files changed, 202 insertions(+), 90 deletions(-)