From patchwork Mon Feb 5 13:39:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Auger X-Patchwork-Id: 869287 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3zZpdH09vDz9s75 for ; Tue, 6 Feb 2018 00:40:50 +1100 (AEDT) Received: from localhost ([::1]:44923 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eih0o-0004dY-GF for incoming@patchwork.ozlabs.org; Mon, 05 Feb 2018 08:40:46 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50732) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eih0C-0004ZL-Ut for qemu-devel@nongnu.org; Mon, 05 Feb 2018 08:40:13 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eih0B-0004zb-G2 for qemu-devel@nongnu.org; Mon, 05 Feb 2018 08:40:08 -0500 Received: from mx1.redhat.com ([209.132.183.28]:50726) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eih02-0004ls-18; Mon, 05 Feb 2018 08:39:58 -0500 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 54848C049D43; Mon, 5 Feb 2018 13:39:55 +0000 (UTC) Received: from localhost.localdomain.com (ovpn-116-112.ams2.redhat.com [10.36.116.112]) by smtp.corp.redhat.com (Postfix) with ESMTP id 5DC8817558; Mon, 5 Feb 2018 13:39:35 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org, prem.mallappa@gmail.com, alex.williamson@redhat.com Date: Mon, 5 Feb 2018 14:39:18 +0100 Message-Id: <1517837972-1904-1-git-send-email-eric.auger@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Mon, 05 Feb 2018 13:39:55 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v8 00/14] ARM SMMUv3 Emulation Support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mst@redhat.com, jean-philippe.brucker@arm.com, tn@semihalf.com, peterx@redhat.com, edgar.iglesias@gmail.com, linuc.decode@gmail.com, bharat.bhushan@nxp.com, christoffer.dall@linaro.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" This series implements the emulation code for ARM SMMUv3. SMMUv3 gets instantiated by adding ",iommu=smmuv3" to the virt machine option. VHOST integration will be handled in a separate series. VFIO integration is not targeted at the moment. Only stage 1 and AArch64 page table walk are supported. Main changes since v7: I Took into account Peter's comments: - revisit queue data structures - use registerfields.h and got rid of reg array - use dma_memory_read for all descriptor fetches - got rid of page table walk for an iova range and implemented standard page table walk for single IOVA - revisit event data structure - report events in many more situations and pass the event handle all along the decode and ptw phases - fix gerror/gerron computations - completely got rid of stage2 decoding - use a machine option for instantiation - get rid of VFIO integration - get rid of VHOST integration (this will be added in a - abort in case vhost/vfio notifiers get detected second step together with TLB emulation) - Tested migration - fixed TTBR index computation (issue reported by Tomasz) Best Regards Eric This series can be found at: v8: https://github.com/eauger/qemu/tree/v2.11.0-SMMU-v8 Previous version at: v7: https://github.com/eauger/qemu/tree/v2.10.0-SMMU-v7 History: v7 -> v8: - see above and individual patch change log v6 -> v7: - DPDK testpmd now running on guest with 2 assigned VFs - Changed the instantiation method: add the following option to the QEMU command line -device smmu # for virtio/vhost use cases -device smmu,caching-mode # for vfio use cases (based on [1]) - splitted the series into smaller patches to allow the review - the VFIO integration based on "ltlbi-on-map" smmuv3 driver is isolated from the rest: last 2 patches, not for upstream. This is shipped for testing/bench until a better solution is found. - Reworked permission flag checks and event generation v5 -> v6: - Rebase on 2.10 and IOMMUMemoryRegion - add ACPI TLBI_ON_MAP support (VFIO integration also works in ACPI mode) - fix block replay - handle implementation defined SMMU_CMD_TLBI_NH_VA_AM cmd (goes along with TLBI_ON_MAP FW quirk) - replay systematically unmap the whole range first - smmuv3_map_hook does not unmap anymore and the unmap is done before the replay - add and use smmuv3_context_device_invalidate instead of blindly replaying everything v4 -> v5: - initial_level now part of SMMUTransCfg - smmu_page_walk_64 takes into account the max input size - implement sys->iommu_ops.replay and sys->iommu_ops.notify_flag_changed - smmuv3_translate: bug fix: don't walk on bypass - smmu_update_qreg: fix PROD index update - I did not yet address Peter's comments as the code is not mature enough to be split into sub patches. v3 -> v4 [Eric]: - page table walk rewritten to allow scan of the page table within a range of IOVA. This prepares for VFIO integration and replay. - configuration parsing partially reworked. - do not advertise unsupported/untested features: S2, S1 + S2, HYP, PRI, ATS, .. - added ACPI table generation - migrated to dynamic traces - mingw compilation fix v2 -> v3 [Eric]: - rebased on 2.9 - mostly code and patch reorganization to ease the review process - optional patches removed. They may be handled separately. I am currently working on ACPI enablement. - optional instantiation of the smmu in mach-virt - removed [2/9] (fdt functions) since not mandated - start splitting main patch into base and derived object - no new function feature added v1 -> v2 [Prem]: - Adopted review comments from Eric Auger - Make SMMU_DPRINTF to internally call qemu_log (since translation requests are too many, we need control on the type of log we want) - SMMUTransCfg modified to suite simplicity - Change RegInfo to uint64 register array - Code cleanup - Test cleanups - Reshuffled patches v0 -> v1 [Prem]: - As per SMMUv3 spec 16.0 (only is_ste_consistant() is noticeable) - Reworked register access/update logic - Factored out translation code for - single point bug fix - sharing/removal in future - (optional) Unit tests added, with PCI test device - S1 with 4k/64k, S1+S2 with 4k/64k - (S1 or S2) only can be verified by Linux 4.7 driver - (optional) Priliminary ACPI support v0 [Prem]: - Implements SMMUv3 spec 11.0 - Supported for PCIe devices, - Command Queue and Event Queue supported - LPAE only, S1 is supported and Tested, S2 not tested - BE mode Translation not supported - IRQ support (legacy, no MSI) - Tested with DPDK and e1000 Eric Auger (11): hw/arm/smmu-common: smmu base device and datatypes hw/arm/smmu-common: IOMMU memory region and address space setup hw/arm/smmu-common: VMSAv8-64 page table walk hw/arm/smmuv3: Wired IRQ and GERROR helpers hw/arm/smmuv3: Queue helpers hw/arm/smmuv3: Implement MMIO write operations hw/arm/smmuv3: Event queue recording helper hw/arm/smmuv3: Implement translate callback hw/arm/smmuv3: Abort on vfio or vhost case target/arm/kvm: Translate the MSI doorbell in kvm_arch_fixup_msi_route hw/arm/virt: Handle iommu in 2.12 machine type Prem Mallappa (3): hw/arm/smmuv3: Skeleton hw/arm/virt: Add SMMUv3 to the virt board hw/arm/virt-acpi-build: Add smmuv3 node in IORT table default-configs/aarch64-softmmu.mak | 1 + hw/arm/Makefile.objs | 1 + hw/arm/smmu-common.c | 352 ++++++++++++ hw/arm/smmu-internal.h | 104 ++++ hw/arm/smmuv3-internal.h | 599 +++++++++++++++++++ hw/arm/smmuv3.c | 1088 +++++++++++++++++++++++++++++++++++ hw/arm/trace-events | 38 ++ hw/arm/virt-acpi-build.c | 56 +- hw/arm/virt.c | 109 +++- include/hw/acpi/acpi-defs.h | 15 + include/hw/arm/smmu-common.h | 138 +++++ include/hw/arm/smmuv3.h | 91 +++ include/hw/arm/virt.h | 11 + target/arm/kvm.c | 27 + target/arm/trace-events | 3 + 15 files changed, 2625 insertions(+), 8 deletions(-) create mode 100644 hw/arm/smmu-common.c create mode 100644 hw/arm/smmu-internal.h create mode 100644 hw/arm/smmuv3-internal.h create mode 100644 hw/arm/smmuv3.c create mode 100644 include/hw/arm/smmu-common.h create mode 100644 include/hw/arm/smmuv3.h