From patchwork Tue Apr 21 04:16:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1273928 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 495r0365D0z9sSK for ; Tue, 21 Apr 2020 14:18:11 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=AP50HKTr; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 495r033RRYzDr1x for ; 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Tue, 21 Apr 2020 14:17:19 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1587442639; bh=/Ph8VM8tebra/fudK7flrC3PBrgosahhkEQqQatBnjc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AP50HKTrXW6mGiDE1UA6AfCZRDX7ZSpSMqh3TvqGzZma359IXTAEmmlh4co3KOlNX n46FeJGvIAJFD7K5ledxCcV643Qhmbw7by7TMyjS6wP6imIap5D/SgSdmdByoWHlcG pHKsqzSZ1cUr72GppL1h7ZuSSBXKzVOkp4Idc2+mzi6g1AAiZ9P4F1xEHe/cF+eHDO 2O9ponF5qMECLQ0Pr0PhN6JnGiBaaynYO5fAjRruADXYyPGlp7Af8N+oCz6/jylcGN Cu+Ykf04NIMAgnKY23d4QK9mKBHRKjqd3kSlApnBCyKmDzLg2j+mTT8y3mTN+cZcyo 5uUt0Ef2fBKNA== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Tue, 21 Apr 2020 14:16:48 +1000 Message-Id: <20200421041655.82856-13-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.3 In-Reply-To: <20200421041655.82856-1-amitay@ozlabs.org> References: <20200421041655.82856-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v4 12/19] libpdbg: Add thread driver using sbefifo X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs Reviewed-by: Alistair Popple --- libpdbg/sbefifo.c | 77 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 77 insertions(+) diff --git a/libpdbg/sbefifo.c b/libpdbg/sbefifo.c index ca3a43d..eeb8d5c 100644 --- a/libpdbg/sbefifo.c +++ b/libpdbg/sbefifo.c @@ -271,6 +271,67 @@ static int sbefifo_pib_write(struct pib *pib, uint64_t addr, uint64_t val) return sbefifo_scom_put(sctx, addr, val); } +static int sbefifo_thread_probe(struct pdbg_target *target) +{ + struct thread *thread = target_to_thread(target); + uint32_t tid; + + assert(!pdbg_target_u32_property(target, "tid", &tid)); + thread->id = tid; + + return 0; +} + +static void sbefifo_thread_release(struct pdbg_target *target) +{ +} + +static int sbefifo_thread_op(struct thread *thread, uint32_t oper) +{ + struct pdbg_target *chiplet = + pdbg_target_require_parent("chiplet", &thread->target); + struct pdbg_target *pib = pdbg_target_require_parent("pib", chiplet); + struct sbefifo *sbefifo = pib_to_sbefifo(pib); + struct sbefifo_context *sctx = sbefifo->get_sbefifo_context(sbefifo); + uint8_t mode = 0; + + /* Enforce special-wakeup for thread stop and sreset */ + if ((oper & 0xf) == SBEFIFO_INSN_OP_STOP || + (oper & 0xf) == SBEFIFO_INSN_OP_SRESET) + mode = 0x2; + + /* This chip-op requires core-id as pervasive (chiplet) id */ + return sbefifo_control_insn(sctx, + pdbg_target_index(chiplet), + thread->id, + oper, + mode); +} +static int sbefifo_thread_start(struct thread *thread) +{ + return sbefifo_thread_op(thread, SBEFIFO_INSN_OP_START); +} + +static int sbefifo_thread_stop(struct thread *thread) +{ + return sbefifo_thread_op(thread, SBEFIFO_INSN_OP_STOP); +} + +static int sbefifo_thread_step(struct thread *thread, int count) +{ + int i, rc = 0; + + for (i = 0; i < count; i++) + rc |= sbefifo_thread_op(thread, SBEFIFO_INSN_OP_STEP); + + return rc; +} + +static int sbefifo_thread_sreset(struct thread *thread) +{ + return sbefifo_thread_op(thread, SBEFIFO_INSN_OP_SRESET); +} + static struct sbefifo_context *sbefifo_op_get_context(struct sbefifo *sbefifo) { return sbefifo->sf_ctx; @@ -352,6 +413,21 @@ static struct pib sbefifo_pib = { }; DECLARE_HW_UNIT(sbefifo_pib); +static struct thread sbefifo_thread = { + .target = { + .name = "SBE FFIO Chip-op based Thread", + .compatible = "ibm,power-thread", + .class = "thread", + .probe = sbefifo_thread_probe, + .release = sbefifo_thread_release, + }, + .start = sbefifo_thread_start, + .stop = sbefifo_thread_stop, + .step = sbefifo_thread_step, + .sreset = sbefifo_thread_sreset, +}; +DECLARE_HW_UNIT(sbefifo_thread); + static struct sbefifo kernel_sbefifo = { .target = { .name = "Kernel based FSI SBE FIFO", @@ -370,6 +446,7 @@ static void register_sbefifo(void) pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &kernel_sbefifo_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_chipop_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_pib_hw_unit); + pdbg_hwunit_register(PDBG_BACKEND_SBEFIFO, &sbefifo_thread_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_mem_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_pba_hw_unit); }