| Message ID | 8f1759e6-6921-8831-fc42-da0b34d4f611@birger-koblitz.de |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | [OpenWrt-Devel] Support for Edimax EW-7476RPC / EW-7478AC | expand |
Hi Birger, thanks for submitting your work. In order to support the external switch, existing generic features should be used in order to implement the phy-reset via GPIO#39. See my comments in the code (I commented the first device only, same applies to the 2nd device as well). On Mon, May 27, 2019 at 05:55:24PM +0200, Birger Koblitz wrote: > ramips: add Netgear EW-7476RPC > > SoC: MediaTek MT7620a @ 580MHz > RAM: 64M (Winbond W9751G6KB-25) > FLASH: 8MB (Macronix) > WiFi: SoC-integrated: MediaTek MT76620a bgn Typo, I supposed. MT7620a (or RT6352 to name the embedded WiFi IP) > WiFi: MediaTek MT7612EN nac > GBE: RTL8211E Please mention how many phyical ports the device got and if all of them support GbE. > BTN: WPS - RFKILL/RF 50%/RF 100% toggle > LED: - Wifi 5g (blue) > - Wifi 2g (blue) > - Crossband (green) > - Power (green) > - WPS (green) > - LAN (Green) > UART: UART is present as Pads with throughholes on the PCB. They are > located next to the switch for the wifi configuration > 3.3V - RX - GND - TX / 57600-8N1 > 3.3V is the square pad > > Installation > ------------ > Update the factory image via the web-interfaces (by default: > 192.168.9.2/24). > http://192.168.9.2/index.asp > > ramips: add Netgear EW-7478AC > > SoC: MediaTek MT7620a @ 580MHz > RAM: 64M (Winbond W9751G6KB-25) > FLASH: 8MB (Macronix) > WiFi: SoC-integrated: MediaTek MT76620a bgn Same here > WiFi: MediaTek MT7612EN nac > GBE: RTL8211E > BTN: WPS - RFKILL/RF 50%/RF 100% toggle > LED: - Wifi 5g (blue) > - Wifi 2g (blue) > - Crossband (green) > - Power (green) > - WPS (green) > - LAN (Green) > UART: UART is present as Pads with throughholes on the PCB. They are > located next to the switch for the wifi configuration > 3.3V - RX - GND - TX / 57600-8N1 > 3.3V is the square pad > > Installation > ------------ > Update the factory image via the web-interfaces (by default: > http://edimaxext.setup) > Or push wpa button on power on and send firmware via tftp to 192.168.1.6 > > The EW-7478AC is identical to the EW-7476RPC, except instead of 2 internal > antennas it has 2 external ones. > > > diff --git a/target/linux/ramips/base-files/etc/board.d/01_leds > b/target/linux/ramips/base-files/etc/board.d/01_leds > index b55ca0413e..78e93b557b 100755 > --- a/target/linux/ramips/base-files/etc/board.d/01_leds > +++ b/target/linux/ramips/base-files/etc/board.d/01_leds > @@ -146,6 +146,10 @@ dir-860l-b1) > edimax,br-6478ac-v2) > set_wifi_led "$boardname:blue:wlan" > ;; > +edimax,ew-7476rpc|\ > +edimax,ew-7478ac) > + ucidef_set_led_switch "lan" "lan" "$boardname:green:lan" > "switch0" "0x20" > + ;; > ex2700|\ > wn3000rpv3) > set_wifi_led "$boardname:green:router" > diff --git a/target/linux/ramips/base-files/etc/board.d/02_network > b/target/linux/ramips/base-files/etc/board.d/02_network > index 2e56678cf5..bbdfe9b128 100755 > --- a/target/linux/ramips/base-files/etc/board.d/02_network > +++ b/target/linux/ramips/base-files/etc/board.d/02_network > @@ -50,6 +50,8 @@ ramips_setup_interfaces() > broadway|\ > dcs-930|\ > dcs-930l-b1|\ > + edimax,ew-7476rpc|\ > + edimax,ew-7478ac|\ > ht-tm02|\ > kimax,u35wf|\ > linkits7688 | \ > diff --git a/target/linux/ramips/dts/EW-7476RPC.dts > b/target/linux/ramips/dts/EW-7476RPC.dts > new file mode 100644 > index 0000000000..7a1edf3e4d > --- /dev/null > +++ b/target/linux/ramips/dts/EW-7476RPC.dts > @@ -0,0 +1,238 @@ > +/* > + * Device Tree file for the Edimax EW-7476RPC > + * based on Edimax BR-6478AC V2 > + * > + * Copyright (C) 2016 Rohan Murch <rohan.murch@gmail.com> > + * Copyright (C) 2016 Hans Ulli Kroll <ulli.kroll@googlemail.com> > + * Copyright (C) 2017 James McKenzie <openwrt@madingley.org> > + * > + * This file is licensed under the terms of the GNU General Public > + * License version 2. This program is licensed "as is" without any > + * warranty of any kind, whether express or implied. > + > + The following definitions were found in the orignal GPL firmware source > + HW_LED_WIRELESS_ABAND_="71" > + HW_LED_WIRELESS_GBAND_="70" > + HW_LED_WIRELES_="69" > + HW_LED_POWER_="67" > + HW_LED_WPS_="68" > + HW_LED_LAN_="66" > + HW_BUTTON_APSWITCH_BUT_1_="62" > + HW_BUTTON_APSWITCH_BUT_2_="63" > + HW_BUTTON_RESET_="60" > + > + The device does not have a reset button (but there are solder pads for > a button), WPS and reset are swapped. > + > + */ > + > +/dts-v1/; > + > +#include "mt7620a.dtsi" > + > +#include <dt-bindings/gpio/gpio.h> > +#include <dt-bindings/input/input.h> > + > +/ { > + compatible = "edimax,ew-7476rpc", "ralink,mt7620a-soc"; > + model = "Edimax EW-7476RPC"; > + > + aliases { > + led-boot = &led_power; > + led-failsafe = &led_power; > + led-running = &led_power; > + led-upgrade = &led_power; > + }; > + > + chosen { > + bootargs = "console=ttyS0,57600"; > + }; > + > + > + keys { > + compatible = "gpio-keys"; > + > + reset_wps { > + label = "reset_wps"; > + gpios = <&gpio2 20 GPIO_ACTIVE_LOW>; > + linux,code = <KEY_RESTART>; > + }; > + switch_high { > + label = "switch high"; > + gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; > + linux,code = <BTN_0>; > + linux,input-type = <EV_SW>; > + }; > + switch_off { > + label = "switch off"; > + gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; > + linux,code = <BTN_1>; > + linux,input-type = <EV_SW>; > + }; > + }; > + > + leds { > + compatible = "gpio-leds"; > + > + led_power: power { > + label = "ew-7476rpc:green:power"; > + gpios = <&gpio2 27 GPIO_ACTIVE_LOW>; > + }; > + lan { > + label = "ew-7476rpc:green:lan"; > + gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; > + }; > + wlan2g { > + label = "ew-7476rpc:blue:wlan2g"; > + gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; > + linux,default-trigger = "phy1radio"; > + }; > + wlan5g { > + label = "ew-7476rpc:blue:wlan5g"; > + gpios = <&gpio2 31 GPIO_ACTIVE_LOW>; > + linux,default-trigger = "phy0radio"; > + }; > + wps { > + label = "ew-7476rpc:green:wps"; > + gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; > + }; > + crossband { > + label = "ew-7476rpc:green:crossband"; > + gpios = <&gpio2 29 GPIO_ACTIVE_LOW>; > + }; > + }; > +}; > + > + > +&gpio2 { > + status = "okay"; > +}; > + > +&spi0 { > + status = "okay"; > + > + flash@0 { > + compatible = "jedec,spi-nor"; > + reg = <0 0>; > + spi-max-frequency = <10000000>; > + > + partitions { > + compatible = "fixed-partitions"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + partition@0 { > + label = "u-boot"; > + reg = <0x0 0x30000>; > + read-only; > + }; > + > + partition@30000 { > + label = "u-boot-env"; > + reg = <0x30000 0x10000>; > + read-only; > + }; > + > + factory: partition@40000 { > + label = "factory"; > + reg = <0x40000 0x10000>; > + read-only; > + }; > + > + partition@50000 { > + label = "cimage"; > + reg = <0x50000 0x20000>; > + read-only; > + }; > + > + partition@70000 { > + compatible = "edimax,uimage"; > + label = "firmware"; > + reg = <0x00070000 0x00790000>; > + }; > + }; > + }; > +}; > + > +&pinctrl { > + state_default: pinctrl0 { > + gpio { > + // might need pin 39: ; > + ralink,group = "i2c", "uartf", "nd_sd", > "rgmii2", "spi refclk"; > + ralink,function = "gpio"; > + }; > + }; > +}; A pinctrl group for the switch reset would be appropriate: GPIO 39 is p4led_an, hence add: phy_reset_pins: phy-reset { gpio { ralink,group = "p4led_an"; ralink,function = "gpio"; }; }; > + > + > +ðernet { > + > + status = "okay"; > + mtd-mac-address = <&factory 0x4>; > + pinctrl-names = "default"; > + pinctrl-0 = <&rgmii1_pins &mdio_pins>; Now use it here pinctrl-0 = <&rgmii1_pins &mdio_pins &phy_reset_pins>; > + mediatek,portmap = "l"; > + mediatek,mdio-mode = <1>; > + > + port@5 { > + status = "okay"; > + mediatek,fixed-link = <1000 1 1 1>; > + phy-mode = "rgmii"; And why not use something like phy-reset-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; here and make sure it's taken care of, because this is imho where it would belong. > + }; > + > + mdio-bus { > + status = "okay"; > + > + phy0: ethernet-phy@0 { > + status ="disabled"; > + reg = <0>; > + phy-mode = "rgmii"; > + }; > + > + phy1: ethernet-phy@1 { > + status = "disabled"; > + reg = <1>; > + phy-mode = "rgmii"; > + }; > + > + phy2: ethernet-phy@2 { > + status = "disabled"; > + reg = <2>; > + phy-mode = "rgmii"; > + }; > + > + phy3: ethernet-phy@3 { > + status = "disabled"; > + reg = <3>; > + phy-mode = "rgmii"; > + }; > + > + phy4: ethernet-phy@4 { > + status = "disabled"; > + reg = <4>; > + phy-mode = "rgmii"; > + }; > + }; > +}; > + > + > +&gsw { > + mediatek,port5 = "gmac"; > + mediatek,rtl8211e-reset = "yes"; No need to add a new property specific for that switch. There are existing generic types for that. > +}; > + > + > +&wmac { > + ralink,mtd-eeprom = <&factory 0>; > +}; > + > +&pcie { > + status = "okay"; > +}; > + > +&pcie0 { > + wifi@0,0 { > + reg = <0x0000 0 0 0 0>; > + mediatek,mtd-eeprom = <&factory 0x8000>; > + mediatek,2ghz = <0>; > + }; > +}; > diff --git a/target/linux/ramips/dts/EW-7478AC.dts > b/target/linux/ramips/dts/EW-7478AC.dts > new file mode 100644 > index 0000000000..ab1b284280 > --- /dev/null > +++ b/target/linux/ramips/dts/EW-7478AC.dts > @@ -0,0 +1,241 @@ > +/* > + * Device Tree file for the Edimax EW-7478AC > + * based on Edimax BR-6478AC V2 > + * > + * Copyright (C) 2016 Rohan Murch <rohan.murch@gmail.com> > + * Copyright (C) 2016 Hans Ulli Kroll <ulli.kroll@googlemail.com> > + * Copyright (C) 2017 James McKenzie <openwrt@madingley.org> > + * > + * This file is licensed under the terms of the GNU General Public > + * License version 2. This program is licensed "as is" without any > + * warranty of any kind, whether express or implied. > + > + The following definitions were found in the orignal GPL firmware source > + HW_LED_WIRELESS_ABAND_="71" > + HW_LED_WIRELESS_GBAND_="70" > + HW_LED_WIRELES_="69" > + HW_LED_POWER_="67" > + HW_LED_WPS_="68" > + HW_LED_LAN_="66" > + HW_BUTTON_APSWITCH_BUT_1_="62" > + HW_BUTTON_APSWITCH_BUT_2_="63" > + HW_BUTTON_RESET_="60" > + > + The device does not have a reset button (but there are solder pads for > a button), WPS and reset are swapped. > + > + */ > + > +/dts-v1/; > + > +#include "mt7620a.dtsi" > + > +#include <dt-bindings/gpio/gpio.h> > +#include <dt-bindings/input/input.h> > + > +/ { > + compatible = "edimax,ew-7478ac", "ralink,mt7620a-soc"; > + model = "Edimax EW-7478ac"; > + > + aliases { > + led-boot = &led_power; > + led-failsafe = &led_power; > + led-running = &led_power; > + led-upgrade = &led_power; > + }; > + > + chosen { > + bootargs = "console=ttyS0,57600"; > + }; > + > + > + keys { > + compatible = "gpio-keys"; > + > + reset_wps { > + label = "reset_wps"; > + gpios = <&gpio2 20 GPIO_ACTIVE_LOW>; > + linux,code = <KEY_RESTART>; > + }; > + > + switch_high { > + label = "switch high"; > + gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; > + linux,code = <BTN_0>; > + linux,input-type = <EV_SW>; > + }; > + > + switch_off { > + label = "switch off"; > + gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; > + linux,code = <BTN_1>; > + linux,input-type = <EV_SW>; > + }; > + }; > + > + leds { > + compatible = "gpio-leds"; > + > + led_power: power { > + label = "ew-7478ac:green:power"; > + gpios = <&gpio2 27 GPIO_ACTIVE_LOW>; > + }; > + lan { > + label = "ew-7478ac:green:lan"; > + gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; > + }; > + wlan2g { > + label = "ew-7478ac:blue:wlan2g"; > + gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; > + linux,default-trigger = "phy1radio"; > + }; > + wlan5g { > + label = "ew-7478ac:blue:wlan5g"; > + gpios = <&gpio2 31 GPIO_ACTIVE_LOW>; > + linux,default-trigger = "phy0radio"; > + }; > + wps { > + label = "ew-7478ac:green:wps"; > + gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; > + }; > + > + crossband { > + label = "ew-7478ac:green:crossband"; > + gpios = <&gpio2 29 GPIO_ACTIVE_LOW>; > + }; > + }; > +}; > + > + > +&gpio2 { > + status = "okay"; > +}; > + > +&spi0 { > + status = "okay"; > + > + flash@0 { > + compatible = "jedec,spi-nor"; > + reg = <0 0>; > + spi-max-frequency = <10000000>; > + > + partitions { > + compatible = "fixed-partitions"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + partition@0 { > + label = "u-boot"; > + reg = <0x0 0x30000>; > + read-only; > + }; > + > + partition@30000 { > + label = "u-boot-env"; > + reg = <0x30000 0x10000>; > + read-only; > + }; > + > + factory: partition@40000 { > + label = "factory"; > + reg = <0x40000 0x10000>; > + read-only; > + }; > + > + partition@50000 { > + label = "cimage"; > + reg = <0x50000 0x20000>; > + read-only; > + }; > + > + partition@70000 { > + compatible = "edimax,uimage"; > + label = "firmware"; > + reg = <0x00070000 0x00790000>; > + }; > + }; > + }; > +}; > + > +&pinctrl { > + state_default: pinctrl0 { > + gpio { > + // might need pin 39: ; > + ralink,group = "i2c", "uartf", "nd_sd", > "rgmii2", "spi refclk"; > + ralink,function = "gpio"; > + }; > + }; > +}; > + > + > +ðernet { > + > + status = "okay"; > + mtd-mac-address = <&factory 0x4>; > + pinctrl-names = "default"; > + pinctrl-0 = <&rgmii1_pins &mdio_pins>; > + mediatek,portmap = "l"; > + mediatek,mdio-mode = <1>; > + > + port@5 { > + status = "okay"; > + mediatek,fixed-link = <1000 1 1 1>; > + phy-mode = "rgmii"; > + }; > + > + mdio-bus { > + status = "okay"; > + > + phy0: ethernet-phy@0 { > + status ="disabled"; > + reg = <0>; > + phy-mode = "rgmii"; > + }; > + > + phy1: ethernet-phy@1 { > + status = "disabled"; > + reg = <1>; > + phy-mode = "rgmii"; > + }; > + > + phy2: ethernet-phy@2 { > + status = "disabled"; > + reg = <2>; > + phy-mode = "rgmii"; > + }; > + > + phy3: ethernet-phy@3 { > + status = "disabled"; > + reg = <3>; > + phy-mode = "rgmii"; > + }; > + > + phy4: ethernet-phy@4 { > + status = "disabled"; > + reg = <4>; > + phy-mode = "rgmii"; > + }; > + }; > +}; > + > + > +&gsw { > + mediatek,port5 = "gmac"; > + mediatek,rtl8211e-reset = "yes"; > +}; > + > + > +&wmac { > + ralink,mtd-eeprom = <&factory 0>; > +}; > + > +&pcie { > + status = "okay"; > +}; > + > +&pcie0 { > + wifi@0,0 { > + reg = <0x0000 0 0 0 0>; > + mediatek,mtd-eeprom = <&factory 0x8000>; > + mediatek,2ghz = <0>; > + }; > +}; > diff --git > a/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c > b/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c > index 5fc5080aaf..305ce18037 100644 > --- > a/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c > +++ > b/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c > @@ -84,6 +84,32 @@ static int mt7620_mdio_mode(struct device_node *eth_node) > return ret; > } > > +void reset_realtek_phy(void){ > +#define RALINK_GPIO_DIR 0xB0000600+0x4C > +#define RALINK_GPIO_DATA 0xB0000600+0x48 > +#define RALINK_RESETPHY_GPIO (39-24) > + u32 gpiodir; > + u32 piodata; > + u32 reset_pin= RALINK_RESETPHY_GPIO; > + > + pr_info("gsw: Resetting RTL8211e using gpio 39\n"); > + gpiodir = le32_to_cpu(*(volatile u32 *)(RALINK_GPIO_DIR)); > + /*set gpio1 to output*/ > + gpiodir |= (1<<reset_pin); > + *(volatile u32 *)(RALINK_GPIO_DIR) = cpu_to_le32(gpiodir); > + > + piodata = le32_to_cpu(*(volatile u32 *)(RALINK_GPIO_DATA)); > + /*set to low(0)*/ > + piodata &= ~(1L << reset_pin); > + *(volatile u32 *)(RALINK_GPIO_DATA) = cpu_to_le32(piodata); > + /*delay 30ms*/ > + mdelay(30); > + /*set to high(1)*/ > + piodata |= (1L << reset_pin); > + *(volatile u32 *)(RALINK_GPIO_DATA) = cpu_to_le32(piodata); > +} > + > + > static void mt7620_hw_init(struct mt7620_gsw *gsw, int mdio_mode) > { > u32 i; > @@ -220,6 +246,7 @@ int mtk_gsw_init(struct fe_priv *priv) > struct device_node *np = priv->switch_np; > struct platform_device *pdev = of_find_device_by_node(np); > struct mt7620_gsw *gsw; > + const char *rtl8211e_reset = NULL; > > if (!pdev) > return -ENODEV; > @@ -231,6 +258,9 @@ int mtk_gsw_init(struct fe_priv *priv) > priv->soc->swpriv = gsw; > > mt7620_hw_init(gsw, mt7620_mdio_mode(priv->dev->of_node)); > + of_property_read_string(np, "mediatek,rtl8211e-reset", > &rtl8211e_reset); > + if (rtl8211e_reset && !strcmp(rtl8211e_reset, "yes")) > + reset_realtek_phy(); > > if (gsw->irq) { > request_irq(gsw->irq, gsw_interrupt_mt7620, 0, > diff --git a/target/linux/ramips/image/mt7620.mk > b/target/linux/ramips/image/mt7620.mk > index cf38aa2cb1..a7b14593c2 100644 > --- a/target/linux/ramips/image/mt7620.mk > +++ b/target/linux/ramips/image/mt7620.mk > @@ -617,6 +617,32 @@ define Device/edimax_br-6478ac-v2 > endef > TARGET_DEVICES += edimax_br-6478ac-v2 > > +define Device/edimax_ew-7476rpc > + DTS := EW-7476RPC > + DEVICE_TITLE := Edimax EW-7476RPC > + BLOCKSIZE := 4k > + IMAGE_SIZE := 7616k > + IMAGE/sysupgrade.bin := append-kernel | append-rootfs | \ > + edimax-header -s CSYS -m RN79 -f 0x70000 -S 0x01100000 | > pad-rootfs | \ > + append-metadata | check-size $$$$(IMAGE_SIZE) > + DEVICE_PACKAGES := kmod-mt76x2 kmod-phy-realtek > +endef > +TARGET_DEVICES += edimax_ew-7476rpc > + > + > +define Device/edimax_ew-7478ac > + DTS := EW-7478AC > + DEVICE_TITLE := Edimax EW-7478AC > + BLOCKSIZE := 4k > + IMAGE_SIZE := 7616k > + IMAGE/sysupgrade.bin := append-kernel | append-rootfs | \ > + edimax-header -s CSYS -m RN70 -f 0x70000 -S 0x01100000 | > pad-rootfs | \ > + append-metadata | check-size $$$$(IMAGE_SIZE) > + DEVICE_PACKAGES := kmod-mt76x2 kmod-phy-realtek > +endef > +TARGET_DEVICES += edimax_ew-7478ac > + > + > define Device/tplink_c2-v1 > $(Device/Archer) > DTS := ArcherC2-v1 > > > > > > _______________________________________________ > openwrt-devel mailing list > openwrt-devel@lists.openwrt.org > https://lists.openwrt.org/mailman/listinfo/openwrt-devel
On Mon, May 27, 2019 at 06:35:30PM +0200, Daniel Golle wrote: > Hi Birger, > > thanks for submitting your work. In order to support the external > switch, existing generic features should be used in order to > implement the phy-reset via GPIO#39. > See my comments in the code (I commented the first device only, same > applies to the 2nd device as well). > > On Mon, May 27, 2019 at 05:55:24PM +0200, Birger Koblitz wrote: > > ramips: add Netgear EW-7476RPC > > > > SoC: MediaTek MT7620a @ 580MHz > > RAM: 64M (Winbond W9751G6KB-25) > > FLASH: 8MB (Macronix) > > WiFi: SoC-integrated: MediaTek MT76620a bgn > > Typo, I supposed. MT7620a (or RT6352 to name the embedded WiFi IP) > > > WiFi: MediaTek MT7612EN nac > > GBE: RTL8211E > > Please mention how many phyical ports the device got and if all of > them support GbE. Sorry, that was stupid of me. I just realized we are talking about a wall-wart: https://fccid.io/NDD9574761501/Internal-Photos/Internal-Photos-2706172 So it's a simple PHY with 1x GbE obviously ;) > > > BTN: WPS - RFKILL/RF 50%/RF 100% toggle > > LED: - Wifi 5g (blue) > > - Wifi 2g (blue) > > - Crossband (green) > > - Power (green) > > - WPS (green) > > - LAN (Green) > > UART: UART is present as Pads with throughholes on the PCB. They are > > located next to the switch for the wifi configuration > > 3.3V - RX - GND - TX / 57600-8N1 > > 3.3V is the square pad > > > > Installation > > ------------ > > Update the factory image via the web-interfaces (by default: > > 192.168.9.2/24). > > http://192.168.9.2/index.asp > > > > ramips: add Netgear EW-7478AC > > > > SoC: MediaTek MT7620a @ 580MHz > > RAM: 64M (Winbond W9751G6KB-25) > > FLASH: 8MB (Macronix) > > WiFi: SoC-integrated: MediaTek MT76620a bgn > Same here > > > WiFi: MediaTek MT7612EN nac > > GBE: RTL8211E > > BTN: WPS - RFKILL/RF 50%/RF 100% toggle > > LED: - Wifi 5g (blue) > > - Wifi 2g (blue) > > - Crossband (green) > > - Power (green) > > - WPS (green) > > - LAN (Green) > > UART: UART is present as Pads with throughholes on the PCB. They are > > located next to the switch for the wifi configuration > > 3.3V - RX - GND - TX / 57600-8N1 > > 3.3V is the square pad > > > > Installation > > ------------ > > Update the factory image via the web-interfaces (by default: > > http://edimaxext.setup) > > Or push wpa button on power on and send firmware via tftp to 192.168.1.6 > > > > The EW-7478AC is identical to the EW-7476RPC, except instead of 2 internal > > antennas it has 2 external ones. > > > > > > diff --git a/target/linux/ramips/base-files/etc/board.d/01_leds > > b/target/linux/ramips/base-files/etc/board.d/01_leds > > index b55ca0413e..78e93b557b 100755 > > --- a/target/linux/ramips/base-files/etc/board.d/01_leds > > +++ b/target/linux/ramips/base-files/etc/board.d/01_leds > > @@ -146,6 +146,10 @@ dir-860l-b1) > > edimax,br-6478ac-v2) > > set_wifi_led "$boardname:blue:wlan" > > ;; > > +edimax,ew-7476rpc|\ > > +edimax,ew-7478ac) > > + ucidef_set_led_switch "lan" "lan" "$boardname:green:lan" > > "switch0" "0x20" > > + ;; > > ex2700|\ > > wn3000rpv3) > > set_wifi_led "$boardname:green:router" > > diff --git a/target/linux/ramips/base-files/etc/board.d/02_network > > b/target/linux/ramips/base-files/etc/board.d/02_network > > index 2e56678cf5..bbdfe9b128 100755 > > --- a/target/linux/ramips/base-files/etc/board.d/02_network > > +++ b/target/linux/ramips/base-files/etc/board.d/02_network > > @@ -50,6 +50,8 @@ ramips_setup_interfaces() > > broadway|\ > > dcs-930|\ > > dcs-930l-b1|\ > > + edimax,ew-7476rpc|\ > > + edimax,ew-7478ac|\ > > ht-tm02|\ > > kimax,u35wf|\ > > linkits7688 | \ > > diff --git a/target/linux/ramips/dts/EW-7476RPC.dts > > b/target/linux/ramips/dts/EW-7476RPC.dts > > new file mode 100644 > > index 0000000000..7a1edf3e4d > > --- /dev/null > > +++ b/target/linux/ramips/dts/EW-7476RPC.dts > > @@ -0,0 +1,238 @@ > > +/* > > + * Device Tree file for the Edimax EW-7476RPC > > + * based on Edimax BR-6478AC V2 > > + * > > + * Copyright (C) 2016 Rohan Murch <rohan.murch@gmail.com> > > + * Copyright (C) 2016 Hans Ulli Kroll <ulli.kroll@googlemail.com> > > + * Copyright (C) 2017 James McKenzie <openwrt@madingley.org> > > + * > > + * This file is licensed under the terms of the GNU General Public > > + * License version 2. This program is licensed "as is" without any > > + * warranty of any kind, whether express or implied. > > + > > + The following definitions were found in the orignal GPL firmware source > > + HW_LED_WIRELESS_ABAND_="71" > > + HW_LED_WIRELESS_GBAND_="70" > > + HW_LED_WIRELES_="69" > > + HW_LED_POWER_="67" > > + HW_LED_WPS_="68" > > + HW_LED_LAN_="66" > > + HW_BUTTON_APSWITCH_BUT_1_="62" > > + HW_BUTTON_APSWITCH_BUT_2_="63" > > + HW_BUTTON_RESET_="60" > > + > > + The device does not have a reset button (but there are solder pads for > > a button), WPS and reset are swapped. > > + > > + */ > > + > > +/dts-v1/; > > + > > +#include "mt7620a.dtsi" > > + > > +#include <dt-bindings/gpio/gpio.h> > > +#include <dt-bindings/input/input.h> > > + > > +/ { > > + compatible = "edimax,ew-7476rpc", "ralink,mt7620a-soc"; > > + model = "Edimax EW-7476RPC"; > > + > > + aliases { > > + led-boot = &led_power; > > + led-failsafe = &led_power; > > + led-running = &led_power; > > + led-upgrade = &led_power; > > + }; > > + > > + chosen { > > + bootargs = "console=ttyS0,57600"; > > + }; > > + > > + > > + keys { > > + compatible = "gpio-keys"; > > + > > + reset_wps { > > + label = "reset_wps"; > > + gpios = <&gpio2 20 GPIO_ACTIVE_LOW>; > > + linux,code = <KEY_RESTART>; > > + }; > > + switch_high { > > + label = "switch high"; > > + gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; > > + linux,code = <BTN_0>; > > + linux,input-type = <EV_SW>; > > + }; > > + switch_off { > > + label = "switch off"; > > + gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; > > + linux,code = <BTN_1>; > > + linux,input-type = <EV_SW>; > > + }; > > + }; > > + > > + leds { > > + compatible = "gpio-leds"; > > + > > + led_power: power { > > + label = "ew-7476rpc:green:power"; > > + gpios = <&gpio2 27 GPIO_ACTIVE_LOW>; > > + }; > > + lan { > > + label = "ew-7476rpc:green:lan"; > > + gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; > > + }; > > + wlan2g { > > + label = "ew-7476rpc:blue:wlan2g"; > > + gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; > > + linux,default-trigger = "phy1radio"; > > + }; > > + wlan5g { > > + label = "ew-7476rpc:blue:wlan5g"; > > + gpios = <&gpio2 31 GPIO_ACTIVE_LOW>; > > + linux,default-trigger = "phy0radio"; > > + }; > > + wps { > > + label = "ew-7476rpc:green:wps"; > > + gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; > > + }; > > + crossband { > > + label = "ew-7476rpc:green:crossband"; > > + gpios = <&gpio2 29 GPIO_ACTIVE_LOW>; > > + }; > > + }; > > +}; > > + > > + > > +&gpio2 { > > + status = "okay"; > > +}; > > + > > +&spi0 { > > + status = "okay"; > > + > > + flash@0 { > > + compatible = "jedec,spi-nor"; > > + reg = <0 0>; > > + spi-max-frequency = <10000000>; > > + > > + partitions { > > + compatible = "fixed-partitions"; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + > > + partition@0 { > > + label = "u-boot"; > > + reg = <0x0 0x30000>; > > + read-only; > > + }; > > + > > + partition@30000 { > > + label = "u-boot-env"; > > + reg = <0x30000 0x10000>; > > + read-only; > > + }; > > + > > + factory: partition@40000 { > > + label = "factory"; > > + reg = <0x40000 0x10000>; > > + read-only; > > + }; > > + > > + partition@50000 { > > + label = "cimage"; > > + reg = <0x50000 0x20000>; > > + read-only; > > + }; > > + > > + partition@70000 { > > + compatible = "edimax,uimage"; > > + label = "firmware"; > > + reg = <0x00070000 0x00790000>; > > + }; > > + }; > > + }; > > +}; > > + > > +&pinctrl { > > + state_default: pinctrl0 { > > + gpio { > > + // might need pin 39: ; > > + ralink,group = "i2c", "uartf", "nd_sd", > > "rgmii2", "spi refclk"; > > + ralink,function = "gpio"; > > + }; > > + }; > > +}; > > A pinctrl group for the switch reset would be appropriate: > GPIO 39 is p4led_an, hence add: > phy_reset_pins: phy-reset { > gpio { > ralink,group = "p4led_an"; > ralink,function = "gpio"; > }; > }; > > > + > > + > > +ðernet { > > + > > + status = "okay"; > > + mtd-mac-address = <&factory 0x4>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&rgmii1_pins &mdio_pins>; > > Now use it here > pinctrl-0 = <&rgmii1_pins &mdio_pins &phy_reset_pins>; > > > + mediatek,portmap = "l"; > > + mediatek,mdio-mode = <1>; > > + > > + port@5 { > > + status = "okay"; > > + mediatek,fixed-link = <1000 1 1 1>; > > + phy-mode = "rgmii"; > > And why not use something like > phy-reset-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; > here and make sure it's taken care of, because this is imho where it > would belong. > > > + }; > > + > > + mdio-bus { > > + status = "okay"; > > + > > + phy0: ethernet-phy@0 { > > + status ="disabled"; > > + reg = <0>; > > + phy-mode = "rgmii"; > > + }; > > + > > + phy1: ethernet-phy@1 { > > + status = "disabled"; > > + reg = <1>; > > + phy-mode = "rgmii"; > > + }; > > + > > + phy2: ethernet-phy@2 { > > + status = "disabled"; > > + reg = <2>; > > + phy-mode = "rgmii"; > > + }; > > + > > + phy3: ethernet-phy@3 { > > + status = "disabled"; > > + reg = <3>; > > + phy-mode = "rgmii"; > > + }; > > + > > + phy4: ethernet-phy@4 { > > + status = "disabled"; > > + reg = <4>; > > + phy-mode = "rgmii"; > > + }; > > + }; > > +}; > > + > > + > > +&gsw { > > + mediatek,port5 = "gmac"; > > + mediatek,rtl8211e-reset = "yes"; > No need to add a new property specific for that switch. There are > existing generic types for that. > > > +}; > > + > > + > > +&wmac { > > + ralink,mtd-eeprom = <&factory 0>; > > +}; > > + > > +&pcie { > > + status = "okay"; > > +}; > > + > > +&pcie0 { > > + wifi@0,0 { > > + reg = <0x0000 0 0 0 0>; > > + mediatek,mtd-eeprom = <&factory 0x8000>; > > + mediatek,2ghz = <0>; > > + }; > > +}; > > diff --git a/target/linux/ramips/dts/EW-7478AC.dts > > b/target/linux/ramips/dts/EW-7478AC.dts > > new file mode 100644 > > index 0000000000..ab1b284280 > > --- /dev/null > > +++ b/target/linux/ramips/dts/EW-7478AC.dts > > @@ -0,0 +1,241 @@ > > +/* > > + * Device Tree file for the Edimax EW-7478AC > > + * based on Edimax BR-6478AC V2 > > + * > > + * Copyright (C) 2016 Rohan Murch <rohan.murch@gmail.com> > > + * Copyright (C) 2016 Hans Ulli Kroll <ulli.kroll@googlemail.com> > > + * Copyright (C) 2017 James McKenzie <openwrt@madingley.org> > > + * > > + * This file is licensed under the terms of the GNU General Public > > + * License version 2. This program is licensed "as is" without any > > + * warranty of any kind, whether express or implied. > > + > > + The following definitions were found in the orignal GPL firmware source > > + HW_LED_WIRELESS_ABAND_="71" > > + HW_LED_WIRELESS_GBAND_="70" > > + HW_LED_WIRELES_="69" > > + HW_LED_POWER_="67" > > + HW_LED_WPS_="68" > > + HW_LED_LAN_="66" > > + HW_BUTTON_APSWITCH_BUT_1_="62" > > + HW_BUTTON_APSWITCH_BUT_2_="63" > > + HW_BUTTON_RESET_="60" > > + > > + The device does not have a reset button (but there are solder pads for > > a button), WPS and reset are swapped. > > + > > + */ > > + > > +/dts-v1/; > > + > > +#include "mt7620a.dtsi" > > + > > +#include <dt-bindings/gpio/gpio.h> > > +#include <dt-bindings/input/input.h> > > + > > +/ { > > + compatible = "edimax,ew-7478ac", "ralink,mt7620a-soc"; > > + model = "Edimax EW-7478ac"; > > + > > + aliases { > > + led-boot = &led_power; > > + led-failsafe = &led_power; > > + led-running = &led_power; > > + led-upgrade = &led_power; > > + }; > > + > > + chosen { > > + bootargs = "console=ttyS0,57600"; > > + }; > > + > > + > > + keys { > > + compatible = "gpio-keys"; > > + > > + reset_wps { > > + label = "reset_wps"; > > + gpios = <&gpio2 20 GPIO_ACTIVE_LOW>; > > + linux,code = <KEY_RESTART>; > > + }; > > + > > + switch_high { > > + label = "switch high"; > > + gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; > > + linux,code = <BTN_0>; > > + linux,input-type = <EV_SW>; > > + }; > > + > > + switch_off { > > + label = "switch off"; > > + gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; > > + linux,code = <BTN_1>; > > + linux,input-type = <EV_SW>; > > + }; > > + }; > > + > > + leds { > > + compatible = "gpio-leds"; > > + > > + led_power: power { > > + label = "ew-7478ac:green:power"; > > + gpios = <&gpio2 27 GPIO_ACTIVE_LOW>; > > + }; > > + lan { > > + label = "ew-7478ac:green:lan"; > > + gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; > > + }; > > + wlan2g { > > + label = "ew-7478ac:blue:wlan2g"; > > + gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; > > + linux,default-trigger = "phy1radio"; > > + }; > > + wlan5g { > > + label = "ew-7478ac:blue:wlan5g"; > > + gpios = <&gpio2 31 GPIO_ACTIVE_LOW>; > > + linux,default-trigger = "phy0radio"; > > + }; > > + wps { > > + label = "ew-7478ac:green:wps"; > > + gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; > > + }; > > + > > + crossband { > > + label = "ew-7478ac:green:crossband"; > > + gpios = <&gpio2 29 GPIO_ACTIVE_LOW>; > > + }; > > + }; > > +}; > > + > > + > > +&gpio2 { > > + status = "okay"; > > +}; > > + > > +&spi0 { > > + status = "okay"; > > + > > + flash@0 { > > + compatible = "jedec,spi-nor"; > > + reg = <0 0>; > > + spi-max-frequency = <10000000>; > > + > > + partitions { > > + compatible = "fixed-partitions"; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + > > + partition@0 { > > + label = "u-boot"; > > + reg = <0x0 0x30000>; > > + read-only; > > + }; > > + > > + partition@30000 { > > + label = "u-boot-env"; > > + reg = <0x30000 0x10000>; > > + read-only; > > + }; > > + > > + factory: partition@40000 { > > + label = "factory"; > > + reg = <0x40000 0x10000>; > > + read-only; > > + }; > > + > > + partition@50000 { > > + label = "cimage"; > > + reg = <0x50000 0x20000>; > > + read-only; > > + }; > > + > > + partition@70000 { > > + compatible = "edimax,uimage"; > > + label = "firmware"; > > + reg = <0x00070000 0x00790000>; > > + }; > > + }; > > + }; > > +}; > > + > > +&pinctrl { > > + state_default: pinctrl0 { > > + gpio { > > + // might need pin 39: ; > > + ralink,group = "i2c", "uartf", "nd_sd", > > "rgmii2", "spi refclk"; > > + ralink,function = "gpio"; > > + }; > > + }; > > +}; > > + > > + > > +ðernet { > > + > > + status = "okay"; > > + mtd-mac-address = <&factory 0x4>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&rgmii1_pins &mdio_pins>; > > + mediatek,portmap = "l"; > > + mediatek,mdio-mode = <1>; > > + > > + port@5 { > > + status = "okay"; > > + mediatek,fixed-link = <1000 1 1 1>; > > + phy-mode = "rgmii"; > > + }; > > + > > + mdio-bus { > > + status = "okay"; > > + > > + phy0: ethernet-phy@0 { > > + status ="disabled"; > > + reg = <0>; > > + phy-mode = "rgmii"; > > + }; > > + > > + phy1: ethernet-phy@1 { > > + status = "disabled"; > > + reg = <1>; > > + phy-mode = "rgmii"; > > + }; > > + > > + phy2: ethernet-phy@2 { > > + status = "disabled"; > > + reg = <2>; > > + phy-mode = "rgmii"; > > + }; > > + > > + phy3: ethernet-phy@3 { > > + status = "disabled"; > > + reg = <3>; > > + phy-mode = "rgmii"; > > + }; > > + > > + phy4: ethernet-phy@4 { > > + status = "disabled"; > > + reg = <4>; > > + phy-mode = "rgmii"; > > + }; > > + }; > > +}; > > + > > + > > +&gsw { > > + mediatek,port5 = "gmac"; > > + mediatek,rtl8211e-reset = "yes"; > > +}; > > + > > + > > +&wmac { > > + ralink,mtd-eeprom = <&factory 0>; > > +}; > > + > > +&pcie { > > + status = "okay"; > > +}; > > + > > +&pcie0 { > > + wifi@0,0 { > > + reg = <0x0000 0 0 0 0>; > > + mediatek,mtd-eeprom = <&factory 0x8000>; > > + mediatek,2ghz = <0>; > > + }; > > +}; > > diff --git > > a/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c > > b/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c > > index 5fc5080aaf..305ce18037 100644 > > --- > > a/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c > > +++ > > b/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c > > @@ -84,6 +84,32 @@ static int mt7620_mdio_mode(struct device_node *eth_node) > > return ret; > > } > > > > +void reset_realtek_phy(void){ > > +#define RALINK_GPIO_DIR 0xB0000600+0x4C > > +#define RALINK_GPIO_DATA 0xB0000600+0x48 > > +#define RALINK_RESETPHY_GPIO (39-24) > > + u32 gpiodir; > > + u32 piodata; > > + u32 reset_pin= RALINK_RESETPHY_GPIO; > > + > > + pr_info("gsw: Resetting RTL8211e using gpio 39\n"); > > + gpiodir = le32_to_cpu(*(volatile u32 *)(RALINK_GPIO_DIR)); > > + /*set gpio1 to output*/ > > + gpiodir |= (1<<reset_pin); > > + *(volatile u32 *)(RALINK_GPIO_DIR) = cpu_to_le32(gpiodir); > > + > > + piodata = le32_to_cpu(*(volatile u32 *)(RALINK_GPIO_DATA)); > > + /*set to low(0)*/ > > + piodata &= ~(1L << reset_pin); > > + *(volatile u32 *)(RALINK_GPIO_DATA) = cpu_to_le32(piodata); > > + /*delay 30ms*/ > > + mdelay(30); > > + /*set to high(1)*/ > > + piodata |= (1L << reset_pin); > > + *(volatile u32 *)(RALINK_GPIO_DATA) = cpu_to_le32(piodata); > > +} > > + > > + > > static void mt7620_hw_init(struct mt7620_gsw *gsw, int mdio_mode) > > { > > u32 i; > > @@ -220,6 +246,7 @@ int mtk_gsw_init(struct fe_priv *priv) > > struct device_node *np = priv->switch_np; > > struct platform_device *pdev = of_find_device_by_node(np); > > struct mt7620_gsw *gsw; > > + const char *rtl8211e_reset = NULL; > > > > if (!pdev) > > return -ENODEV; > > @@ -231,6 +258,9 @@ int mtk_gsw_init(struct fe_priv *priv) > > priv->soc->swpriv = gsw; > > > > mt7620_hw_init(gsw, mt7620_mdio_mode(priv->dev->of_node)); > > + of_property_read_string(np, "mediatek,rtl8211e-reset", > > &rtl8211e_reset); > > + if (rtl8211e_reset && !strcmp(rtl8211e_reset, "yes")) > > + reset_realtek_phy(); > > > > if (gsw->irq) { > > request_irq(gsw->irq, gsw_interrupt_mt7620, 0, > > diff --git a/target/linux/ramips/image/mt7620.mk > > b/target/linux/ramips/image/mt7620.mk > > index cf38aa2cb1..a7b14593c2 100644 > > --- a/target/linux/ramips/image/mt7620.mk > > +++ b/target/linux/ramips/image/mt7620.mk > > @@ -617,6 +617,32 @@ define Device/edimax_br-6478ac-v2 > > endef > > TARGET_DEVICES += edimax_br-6478ac-v2 > > > > +define Device/edimax_ew-7476rpc > > + DTS := EW-7476RPC > > + DEVICE_TITLE := Edimax EW-7476RPC > > + BLOCKSIZE := 4k > > + IMAGE_SIZE := 7616k > > + IMAGE/sysupgrade.bin := append-kernel | append-rootfs | \ > > + edimax-header -s CSYS -m RN79 -f 0x70000 -S 0x01100000 | > > pad-rootfs | \ > > + append-metadata | check-size $$$$(IMAGE_SIZE) > > + DEVICE_PACKAGES := kmod-mt76x2 kmod-phy-realtek > > +endef > > +TARGET_DEVICES += edimax_ew-7476rpc > > + > > + > > +define Device/edimax_ew-7478ac > > + DTS := EW-7478AC > > + DEVICE_TITLE := Edimax EW-7478AC > > + BLOCKSIZE := 4k > > + IMAGE_SIZE := 7616k > > + IMAGE/sysupgrade.bin := append-kernel | append-rootfs | \ > > + edimax-header -s CSYS -m RN70 -f 0x70000 -S 0x01100000 | > > pad-rootfs | \ > > + append-metadata | check-size $$$$(IMAGE_SIZE) > > + DEVICE_PACKAGES := kmod-mt76x2 kmod-phy-realtek > > +endef > > +TARGET_DEVICES += edimax_ew-7478ac > > + > > + > > define Device/tplink_c2-v1 > > $(Device/Archer) > > DTS := ArcherC2-v1 > > > > > > > > > > > > _______________________________________________ > > openwrt-devel mailing list > > openwrt-devel@lists.openwrt.org > > https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Hi Daniel, On 27.05.19 18:43, Daniel Golle wrote: > On Mon, May 27, 2019 at 06:35:30PM +0200, Daniel Golle wrote: >> Hi Birger, >> >> thanks for submitting your work. In order to support the external >> switch, existing generic features should be used in order to >> implement the phy-reset via GPIO#39. >> See my comments in the code (I commented the first device only, same >> applies to the 2nd device as well). >> >> On Mon, May 27, 2019 at 05:55:24PM +0200, Birger Koblitz wrote: >>> ramips: add Netgear EW-7476RPC This is a typo (or better cut-and-paste which went wrong). The device is from Edimax. >>> SoC: MediaTek MT7620a @ 580MHz >>> RAM: 64M (Winbond W9751G6KB-25) >>> FLASH: 8MB (Macronix) >>> WiFi: SoC-integrated: MediaTek MT76620a bgn >> Typo, I supposed. MT7620a (or RT6352 to name the embedded WiFi IP) Yep. >> >>> WiFi: MediaTek MT7612EN nac >>> GBE: RTL8211E >> Please mention how many phyical ports the device got and if all of >> them support GbE. > Sorry, that was stupid of me. I just realized we are talking about a > wall-wart: > https://fccid.io/NDD9574761501/Internal-Photos/Internal-Photos-2706172 > > So it's a simple PHY with 1x GbE obviously ;) So: GbE: 1x (RTL8211E) ? > >>> + >>> +&pinctrl { >>> + state_default: pinctrl0 { >>> + gpio { >>> + // might need pin 39: ; >>> + ralink,group = "i2c", "uartf", "nd_sd", >>> "rgmii2", "spi refclk"; >>> + ralink,function = "gpio"; >>> + }; >>> + }; >>> +}; >> A pinctrl group for the switch reset would be appropriate: >> GPIO 39 is p4led_an, hence add: >> phy_reset_pins: phy-reset { >> gpio { >> ralink,group = "p4led_an"; >> ralink,function = "gpio"; >> }; >> }; Ok. >>> + >>> + >>> +ðernet { >>> + >>> + status = "okay"; >>> + mtd-mac-address = <&factory 0x4>; >>> + pinctrl-names = "default"; >>> + pinctrl-0 = <&rgmii1_pins &mdio_pins>; >> Now use it here >> pinctrl-0 = <&rgmii1_pins &mdio_pins &phy_reset_pins>; OK. >>> + mediatek,portmap = "l"; >>> + mediatek,mdio-mode = <1>; >>> + >>> + port@5 { >>> + status = "okay"; >>> + mediatek,fixed-link = <1000 1 1 1>; >>> + phy-mode = "rgmii"; >> And why not use something like >> phy-reset-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; >> here and make sure it's taken care of, because this is imho where it >> would belong. >> OK, but how do I take care of the phy-reset. Is it OK how it is done directly in the gsw_mt7620.c driver code? Or is there a framework for this, already? And if there is such a framework, then how do I make sure the reset is made at the right point in time during the switch's initialization? >> >>> diff --git >>> a/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c >>> b/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c >>> index 5fc5080aaf..305ce18037 100644 >>> --- >>> a/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c >>> +++ >>> b/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c >>> @@ -84,6 +84,32 @@ static int mt7620_mdio_mode(struct device_node *eth_node) >>> return ret; >>> } >>> >>> +void reset_realtek_phy(void){ >>> +#define RALINK_GPIO_DIR 0xB0000600+0x4C >>> +#define RALINK_GPIO_DATA 0xB0000600+0x48 >>> +#define RALINK_RESETPHY_GPIO (39-24) >>> + u32 gpiodir; >>> + u32 piodata; >>> + u32 reset_pin= RALINK_RESETPHY_GPIO; >>> + >>> + pr_info("gsw: Resetting RTL8211e using gpio 39\n"); >>> + gpiodir = le32_to_cpu(*(volatile u32 *)(RALINK_GPIO_DIR)); >>> + /*set gpio1 to output*/ >>> + gpiodir |= (1<<reset_pin); >>> + *(volatile u32 *)(RALINK_GPIO_DIR) = cpu_to_le32(gpiodir); >>> + >>> + piodata = le32_to_cpu(*(volatile u32 *)(RALINK_GPIO_DATA)); >>> + /*set to low(0)*/ >>> + piodata &= ~(1L << reset_pin); >>> + *(volatile u32 *)(RALINK_GPIO_DATA) = cpu_to_le32(piodata); >>> + /*delay 30ms*/ >>> + mdelay(30); >>> + /*set to high(1)*/ >>> + piodata |= (1L << reset_pin); >>> + *(volatile u32 *)(RALINK_GPIO_DATA) = cpu_to_le32(piodata); >>> +} >>> + >>> + >>> static void mt7620_hw_init(struct mt7620_gsw *gsw, int mdio_mode) >>> { >>> u32 i; >>> @@ -220,6 +246,7 @@ int mtk_gsw_init(struct fe_priv *priv) >>> struct device_node *np = priv->switch_np; >>> struct platform_device *pdev = of_find_device_by_node(np); >>> struct mt7620_gsw *gsw; >>> + const char *rtl8211e_reset = NULL; >>> >>> if (!pdev) >>> return -ENODEV; >>> @@ -231,6 +258,9 @@ int mtk_gsw_init(struct fe_priv *priv) >>> priv->soc->swpriv = gsw; >>> >>> mt7620_hw_init(gsw, mt7620_mdio_mode(priv->dev->of_node)); >>> + of_property_read_string(np, "mediatek,rtl8211e-reset", >>> &rtl8211e_reset); >>> + if (rtl8211e_reset && !strcmp(rtl8211e_reset, "yes")) >>> + reset_realtek_phy(); >>> >>> if (gsw->irq) { >>> request_irq(gsw->irq, gsw_interrupt_mt7620, 0, >>> >>> _______________________________________________ >>> openwrt-devel mailing list >>> openwrt-devel@lists.openwrt.org >>> https://lists.openwrt.org/mailman/listinfo/openwrt-devel >>> Birger
Hi Daniel, I have tried in vain to implement your suggestions. I am stuck and need some help: On 27.05.19 18:43, Daniel Golle wrote: >>> + >>> +&pinctrl { >>> + state_default: pinctrl0 { >>> + gpio { >>> + // might need pin 39: ; >>> + ralink,group = "i2c", "uartf", "nd_sd", >>> "rgmii2", "spi refclk"; >>> + ralink,function = "gpio"; >>> + }; >>> + }; >>> +}; >> A pinctrl group for the switch reset would be appropriate: >> GPIO 39 is p4led_an, hence add: >> phy_reset_pins: phy-reset { >> gpio { >> ralink,group = "p4led_an"; >> ralink,function = "gpio"; >> }; >> }; This does not work, I get the following error during boot: [ 1.227392] rt2880-pinmux pinctrl: invalid group "p4led_an" for function "gpio" [ 1.242028] mtk_soc_eth: probe of 10100000.ethernet failed with error -22 gpio is part of the "spi refclk" group. Even if I remove that from the pinctrl0 group, the error stays. I then tried: &pinctrl { state_default: pinctrl0 { gpio { ralink,group = "i2c", "uartf", "nd_sd", "rgmii2"; ralink,function = "gpio"; }; }; /* the reset pin 39 is part of spi refclk */ phy_reset_pins: phy-reset { gpio { ralink,group = "spi refclk"; ralink,function = "gpio"; }; }; }; ðernet { status = "okay"; mtd-mac-address = <&factory 0x4>; pinctrl-names = "default"; pinctrl-0 = <&rgmii1_pins &mdio_pins &phy_reset_pins>; mediatek,portmap = "l"; mediatek,mdio-mode = <1>; phy-reset-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; ... } Which avoids the error. I am however not able to assign the gpio reset pin. The code looks like this in mtk_eth_soc.c: static int __init fe_init(struct net_device *dev) { struct fe_priv *priv = netdev_priv(dev); struct device_node *port; const char *mac_addr; int err; struct gpio_desc *phy_reset; priv->soc->reset_fe(); if (priv->soc->switch_init) if (priv->soc->switch_init(priv)) { netdev_err(dev, "failed to initialize switch core\n"); return -ENODEV; } phy_reset = devm_gpiod_get_optional(priv->dev, "phy-reset", 0); if(phy_reset) { pr_info("ethernet: Got something else than NULL\n"); if (IS_ERR(phy_reset)){ pr_info("ethernet: Got error %d\n", PTR_ERR(phy_reset)); } else { err = gpiod_direction_output(phy_reset, 1); if(!err) { pr_info("ethernet: direction is output\n"); mdelay(30); gpiod_set_value(phy_reset, 0); } else { pr_info("Error: %d\n", err); } } } else { pr_info("ethernet: No phy-reset present\n"); } However, this gives me the always the weird error code -517 as a result from PTR_ERR(), which is not documented. Any help appreciated. Birger > _______________________________________________ > openwrt-devel mailing list > openwrt-devel@lists.openwrt.org > https://lists.openwrt.org/mailman/listinfo/openwrt-devel >
diff --git a/target/linux/ramips/base-files/etc/board.d/01_leds b/target/linux/ramips/base-files/etc/board.d/01_leds index b55ca0413e..78e93b557b 100755 --- a/target/linux/ramips/base-files/etc/board.d/01_leds +++ b/target/linux/ramips/base-files/etc/board.d/01_leds @@ -146,6 +146,10 @@ dir-860l-b1) edimax,br-6478ac-v2) set_wifi_led "$boardname:blue:wlan" ;; +edimax,ew-7476rpc|\ +edimax,ew-7478ac) + ucidef_set_led_switch "lan" "lan" "$boardname:green:lan" "switch0" "0x20" + ;; ex2700|\ wn3000rpv3) set_wifi_led "$boardname:green:router" diff --git a/target/linux/ramips/base-files/etc/board.d/02_network b/target/linux/ramips/base-files/etc/board.d/02_network index 2e56678cf5..bbdfe9b128 100755 --- a/target/linux/ramips/base-files/etc/board.d/02_network +++ b/target/linux/ramips/base-files/etc/board.d/02_network @@ -50,6 +50,8 @@ ramips_setup_interfaces() broadway|\ dcs-930|\ dcs-930l-b1|\ + edimax,ew-7476rpc|\ + edimax,ew-7478ac|\ ht-tm02|\ kimax,u35wf|\ linkits7688 | \ diff --git a/target/linux/ramips/dts/EW-7476RPC.dts b/target/linux/ramips/dts/EW-7476RPC.dts new file mode 100644 index 0000000000..7a1edf3e4d --- /dev/null +++ b/target/linux/ramips/dts/EW-7476RPC.dts @@ -0,0 +1,238 @@ +/* + * Device Tree file for the Edimax EW-7476RPC + * based on Edimax BR-6478AC V2 + * + * Copyright (C) 2016 Rohan Murch <rohan.murch@gmail.com> + * Copyright (C) 2016 Hans Ulli Kroll <ulli.kroll@googlemail.com> + * Copyright (C) 2017 James McKenzie <openwrt@madingley.org> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + + The following definitions were found in the orignal GPL firmware source + HW_LED_WIRELESS_ABAND_="71" + HW_LED_WIRELESS_GBAND_="70" + HW_LED_WIRELES_="69" + HW_LED_POWER_="67" + HW_LED_WPS_="68" + HW_LED_LAN_="66" + HW_BUTTON_APSWITCH_BUT_1_="62" + HW_BUTTON_APSWITCH_BUT_2_="63" + HW_BUTTON_RESET_="60" + + The device does not have a reset button (but there are solder pads for a button), WPS and reset are swapped. + + */ + +/dts-v1/; + +#include "mt7620a.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +/ { + compatible = "edimax,ew-7476rpc", "ralink,mt7620a-soc"; + model = "Edimax EW-7476RPC"; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + chosen { + bootargs = "console=ttyS0,57600"; + }; + + + keys { + compatible = "gpio-keys"; + + reset_wps { + label = "reset_wps"; + gpios = <&gpio2 20 GPIO_ACTIVE_LOW>; + linux,code = <KEY_RESTART>; + }; + switch_high { + label = "switch high"; + gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; + linux,code = <BTN_0>; + linux,input-type = <EV_SW>; + }; + switch_off { + label = "switch off"; + gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; + linux,code = <BTN_1>; + linux,input-type = <EV_SW>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_power: power { + label = "ew-7476rpc:green:power"; + gpios = <&gpio2 27 GPIO_ACTIVE_LOW>; + }; + lan { + label = "ew-7476rpc:green:lan"; + gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; + }; + wlan2g { + label = "ew-7476rpc:blue:wlan2g"; + gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1radio"; + }; + wlan5g { + label = "ew-7476rpc:blue:wlan5g"; + gpios = <&gpio2 31 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0radio"; + }; + wps { + label = "ew-7476rpc:green:wps"; + gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; + }; + crossband { + label = "ew-7476rpc:green:crossband"; + gpios = <&gpio2 29 GPIO_ACTIVE_LOW>; + }; + }; +}; + + +&gpio2 { + status = "okay"; +}; + +&spi0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0 0>; + spi-max-frequency = <10000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x30000>; + read-only; + }; + + partition@30000 { + label = "u-boot-env"; + reg = <0x30000 0x10000>; + read-only; + }; + + factory: partition@40000 { + label = "factory"; + reg = <0x40000 0x10000>; + read-only; + }; + + partition@50000 { + label = "cimage"; + reg = <0x50000 0x20000>; + read-only; + }; + + partition@70000 { + compatible = "edimax,uimage"; + label = "firmware"; + reg = <0x00070000 0x00790000>; + }; + }; + }; +}; + +&pinctrl { + state_default: pinctrl0 { + gpio { + // might need pin 39: ; + ralink,group = "i2c", "uartf", "nd_sd", "rgmii2", "spi refclk"; + ralink,function = "gpio"; + }; + }; +}; + + +ðernet { + + status = "okay"; + mtd-mac-address = <&factory 0x4>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii1_pins &mdio_pins>; + mediatek,portmap = "l"; + mediatek,mdio-mode = <1>; + + port@5 { + status = "okay"; + mediatek,fixed-link = <1000 1 1 1>; + phy-mode = "rgmii"; + }; + + mdio-bus { + status = "okay"; + + phy0: ethernet-phy@0 { + status ="disabled"; + reg = <0>; + phy-mode = "rgmii"; + }; + + phy1: ethernet-phy@1 { + status = "disabled"; + reg = <1>; + phy-mode = "rgmii"; + }; + + phy2: ethernet-phy@2 { + status = "disabled"; + reg = <2>; + phy-mode = "rgmii"; + }; + + phy3: ethernet-phy@3 { + status = "disabled"; + reg = <3>; + phy-mode = "rgmii"; + }; + + phy4: ethernet-phy@4 { + status = "disabled"; + reg = <4>; + phy-mode = "rgmii"; + }; + }; +}; + + +&gsw { + mediatek,port5 = "gmac"; + mediatek,rtl8211e-reset = "yes"; +}; + + +&wmac { + ralink,mtd-eeprom = <&factory 0>; +}; + +&pcie { + status = "okay"; +}; + +&pcie0 { + wifi@0,0 { + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x8000>; + mediatek,2ghz = <0>; + }; +}; diff --git a/target/linux/ramips/dts/EW-7478AC.dts b/target/linux/ramips/dts/EW-7478AC.dts new file mode 100644 index 0000000000..ab1b284280 --- /dev/null +++ b/target/linux/ramips/dts/EW-7478AC.dts @@ -0,0 +1,241 @@ +/* + * Device Tree file for the Edimax EW-7478AC + * based on Edimax BR-6478AC V2 + * + * Copyright (C) 2016 Rohan Murch <rohan.murch@gmail.com> + * Copyright (C) 2016 Hans Ulli Kroll <ulli.kroll@googlemail.com> + * Copyright (C) 2017 James McKenzie <openwrt@madingley.org> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + + The following definitions were found in the orignal GPL firmware source + HW_LED_WIRELESS_ABAND_="71" + HW_LED_WIRELESS_GBAND_="70" + HW_LED_WIRELES_="69" + HW_LED_POWER_="67" + HW_LED_WPS_="68" + HW_LED_LAN_="66" + HW_BUTTON_APSWITCH_BUT_1_="62" + HW_BUTTON_APSWITCH_BUT_2_="63" + HW_BUTTON_RESET_="60" + + The device does not have a reset button (but there are solder pads for a button), WPS and reset are swapped. + + */ + +/dts-v1/; + +#include "mt7620a.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +/ { + compatible = "edimax,ew-7478ac", "ralink,mt7620a-soc"; + model = "Edimax EW-7478ac"; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + chosen { + bootargs = "console=ttyS0,57600"; + }; + + + keys { + compatible = "gpio-keys"; + + reset_wps { + label = "reset_wps"; + gpios = <&gpio2 20 GPIO_ACTIVE_LOW>; + linux,code = <KEY_RESTART>; + }; + + switch_high { + label = "switch high"; + gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; + linux,code = <BTN_0>; + linux,input-type = <EV_SW>; + }; + + switch_off { + label = "switch off"; + gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; + linux,code = <BTN_1>; + linux,input-type = <EV_SW>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_power: power { + label = "ew-7478ac:green:power"; + gpios = <&gpio2 27 GPIO_ACTIVE_LOW>; + }; + lan { + label = "ew-7478ac:green:lan"; + gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; + }; + wlan2g { + label = "ew-7478ac:blue:wlan2g"; + gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1radio"; + }; + wlan5g { + label = "ew-7478ac:blue:wlan5g"; + gpios = <&gpio2 31 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0radio"; + }; + wps { + label = "ew-7478ac:green:wps"; + gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; + }; + + crossband { + label = "ew-7478ac:green:crossband"; + gpios = <&gpio2 29 GPIO_ACTIVE_LOW>; + }; + }; +}; + + +&gpio2 { + status = "okay"; +}; + +&spi0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0 0>; + spi-max-frequency = <10000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x30000>; + read-only; + }; + + partition@30000 { + label = "u-boot-env"; + reg = <0x30000 0x10000>; + read-only; + }; + + factory: partition@40000 { + label = "factory"; + reg = <0x40000 0x10000>; + read-only; + }; + + partition@50000 { + label = "cimage"; + reg = <0x50000 0x20000>; + read-only; + }; + + partition@70000 { + compatible = "edimax,uimage"; + label = "firmware"; + reg = <0x00070000 0x00790000>; + }; + }; + }; +}; + +&pinctrl { + state_default: pinctrl0 { + gpio { + // might need pin 39: ; + ralink,group = "i2c", "uartf", "nd_sd", "rgmii2", "spi refclk"; + ralink,function = "gpio"; + }; + }; +}; + + +ðernet { + + status = "okay"; + mtd-mac-address = <&factory 0x4>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii1_pins &mdio_pins>; + mediatek,portmap = "l"; + mediatek,mdio-mode = <1>; + + port@5 { + status = "okay"; + mediatek,fixed-link = <1000 1 1 1>; + phy-mode = "rgmii"; + }; + + mdio-bus { + status = "okay"; + + phy0: ethernet-phy@0 { + status ="disabled"; + reg = <0>; + phy-mode = "rgmii"; + }; + + phy1: ethernet-phy@1 { + status = "disabled"; + reg = <1>; + phy-mode = "rgmii"; + }; + + phy2: ethernet-phy@2 { + status = "disabled"; + reg = <2>; + phy-mode = "rgmii"; + }; + + phy3: ethernet-phy@3 { + status = "disabled"; + reg = <3>; + phy-mode = "rgmii"; + }; + + phy4: ethernet-phy@4 { + status = "disabled"; + reg = <4>; + phy-mode = "rgmii"; + }; + }; +}; + + +&gsw { + mediatek,port5 = "gmac"; + mediatek,rtl8211e-reset = "yes"; +}; + + +&wmac { + ralink,mtd-eeprom = <&factory 0>; +}; + +&pcie { + status = "okay"; +}; + +&pcie0 { + wifi@0,0 { + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x8000>; + mediatek,2ghz = <0>; + }; +}; diff --git a/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c b/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c index 5fc5080aaf..305ce18037 100644 --- a/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c +++ b/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c @@ -84,6 +84,32 @@ static int mt7620_mdio_mode(struct device_node *eth_node) return ret; } +void reset_realtek_phy(void){ +#define RALINK_GPIO_DIR 0xB0000600+0x4C +#define RALINK_GPIO_DATA 0xB0000600+0x48 +#define RALINK_RESETPHY_GPIO (39-24) + u32 gpiodir; + u32 piodata; + u32 reset_pin= RALINK_RESETPHY_GPIO; + + pr_info("gsw: Resetting RTL8211e using gpio 39\n"); + gpiodir = le32_to_cpu(*(volatile u32 *)(RALINK_GPIO_DIR)); + /*set gpio1 to output*/ + gpiodir |= (1<<reset_pin); + *(volatile u32 *)(RALINK_GPIO_DIR) = cpu_to_le32(gpiodir); + + piodata = le32_to_cpu(*(volatile u32 *)(RALINK_GPIO_DATA)); + /*set to low(0)*/ + piodata &= ~(1L << reset_pin); + *(volatile u32 *)(RALINK_GPIO_DATA) = cpu_to_le32(piodata); + /*delay 30ms*/ + mdelay(30); + /*set to high(1)*/ + piodata |= (1L << reset_pin); + *(volatile u32 *)(RALINK_GPIO_DATA) = cpu_to_le32(piodata); +} + + static void mt7620_hw_init(struct mt7620_gsw *gsw, int mdio_mode) { u32 i; @@ -220,6 +246,7 @@ int mtk_gsw_init(struct fe_priv *priv) struct device_node *np = priv->switch_np; struct platform_device *pdev = of_find_device_by_node(np); struct mt7620_gsw *gsw; + const char *rtl8211e_reset = NULL; if (!pdev) return -ENODEV; @@ -231,6 +258,9 @@ int mtk_gsw_init(struct fe_priv *priv) priv->soc->swpriv = gsw; mt7620_hw_init(gsw, mt7620_mdio_mode(priv->dev->of_node)); + of_property_read_string(np, "mediatek,rtl8211e-reset", &rtl8211e_reset); + if (rtl8211e_reset && !strcmp(rtl8211e_reset, "yes")) + reset_realtek_phy(); if (gsw->irq) { request_irq(gsw->irq, gsw_interrupt_mt7620, 0, diff --git a/target/linux/ramips/image/mt7620.mk b/target/linux/ramips/image/mt7620.mk index cf38aa2cb1..a7b14593c2 100644 --- a/target/linux/ramips/image/mt7620.mk +++ b/target/linux/ramips/image/mt7620.mk @@ -617,6 +617,32 @@ define Device/edimax_br-6478ac-v2 endef TARGET_DEVICES += edimax_br-6478ac-v2 +define Device/edimax_ew-7476rpc + DTS := EW-7476RPC + DEVICE_TITLE := Edimax EW-7476RPC + BLOCKSIZE := 4k + IMAGE_SIZE := 7616k + IMAGE/sysupgrade.bin := append-kernel | append-rootfs | \ + edimax-header -s CSYS -m RN79 -f 0x70000 -S 0x01100000 | pad-rootfs | \ + append-metadata | check-size $$$$(IMAGE_SIZE) + DEVICE_PACKAGES := kmod-mt76x2 kmod-phy-realtek +endef +TARGET_DEVICES += edimax_ew-7476rpc + + +define Device/edimax_ew-7478ac + DTS := EW-7478AC + DEVICE_TITLE := Edimax EW-7478AC + BLOCKSIZE := 4k + IMAGE_SIZE := 7616k + IMAGE/sysupgrade.bin := append-kernel | append-rootfs | \ + edimax-header -s CSYS -m RN70 -f 0x70000 -S 0x01100000 | pad-rootfs | \ + append-metadata | check-size $$$$(IMAGE_SIZE) + DEVICE_PACKAGES := kmod-mt76x2 kmod-phy-realtek +endef +TARGET_DEVICES += edimax_ew-7478ac + + define Device/tplink_c2-v1