From patchwork Tue Mar 1 03:06:56 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthias Schiffer X-Patchwork-Id: 590279 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from arrakis.dune.hu (caladan.dune.hu [78.24.191.180]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 93C26140B9E for ; Tue, 1 Mar 2016 14:21:57 +1100 (AEDT) Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id 389EEB91DA3; Tue, 1 Mar 2016 04:08:28 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.1 (2015-04-28) on arrakis.dune.hu X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.1 Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP; Tue, 1 Mar 2016 04:08:28 +0100 (CET) Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id 60EC8B91C08 for ; Tue, 1 Mar 2016 04:07:31 +0100 (CET) X-policyd-weight: using cached result; rate: -6.1 Received: from chaos.universe-factory.net (chaos.universe-factory.net [37.72.148.22]) by arrakis.dune.hu (Postfix) with ESMTPS for ; Tue, 1 Mar 2016 04:07:31 +0100 (CET) Received: from avalon.neoraider.dn42 (unknown [IPv6:fd1b:c28a:2fd6::2]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) by chaos.universe-factory.net (Postfix) with ESMTPSA id DFF4E1830AC for ; Tue, 1 Mar 2016 04:07:30 +0100 (CET) From: Matthias Schiffer To: openwrt-devel@lists.openwrt.org Date: Tue, 1 Mar 2016 04:06:56 +0100 Message-Id: <54ee5a4c8251cda3af7c2152d8b1f10b6f8d748a.1456800208.git.mschiffer@universe-factory.net> X-Mailer: git-send-email 2.7.2 In-Reply-To: References: In-Reply-To: References: Subject: [OpenWrt-Devel] [PATCH CC 22/32] ar71xx: fix ethernet initialization on QCA953x-based boards (TP-Link TL-WR841N/ND v9, Compex WPJ531) X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: openwrt-devel-bounces@lists.openwrt.org Sender: "openwrt-devel" The initialization routines for these boards were relying on some (wrong) defaults for the QCA953x ethernet. Make these defaults explicit to prevent breaking them when the QCA953x defaults are fixed. Signed-off-by: Matthias Schiffer Backport of r46206 --- target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v9.c | 6 ++++++ target/linux/ar71xx/files/arch/mips/ath79/mach-wpj531.c | 7 +++++++ 2 files changed, 13 insertions(+) diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v9.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v9.c index c28afc6..3e5c2a2 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v9.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v9.c @@ -109,12 +109,18 @@ static void __init tl_ap143_setup(void) ath79_register_mdio(0, 0x0); /* LAN */ + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; + ath79_eth1_data.duplex = DUPLEX_FULL; + ath79_switch_data.phy_poll_mask |= BIT(4); ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); ath79_register_eth(1); /* WAN */ ath79_switch_data.phy4_mii_en = 1; ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; + ath79_eth0_data.duplex = DUPLEX_FULL; + ath79_eth0_data.speed = SPEED_100; + ath79_eth0_data.phy_mask = BIT(4); ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); ath79_register_eth(0); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wpj531.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wpj531.c index bc13d70..e665a2e 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wpj531.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-wpj531.c @@ -105,12 +105,19 @@ static void __init common_setup(void) ath79_register_mdio(0, 0x0); /* LAN */ + ath79_eth0_data.duplex = DUPLEX_FULL; + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; + ath79_eth0_data.speed = SPEED_100; + ath79_eth0_data.phy_mask = BIT(4); ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ath79_register_eth(0); /* WAN */ ath79_switch_data.phy4_mii_en = 1; + ath79_eth1_data.duplex = DUPLEX_FULL; ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_MII; + ath79_eth1_data.speed = SPEED_100; + ath79_switch_data.phy_poll_mask |= BIT(4); ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); ath79_register_eth(1);