| Message ID | 20231120110138.25476-1-zajec5@gmail.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Rafał Miłecki |
| Headers | show |
| Series | mediatek: filogic: add Acelink EW-7886CAX support | expand |
Hi Rafal, looks good in general, please see minor comments in line. On Mon, Nov 20, 2023 at 12:01:38PM +0100, Rafał Miłecki wrote: > From: Rafał Miłecki <rafal@milecki.pl> > > Acelink EW-7886CAX is an MT7986A (AKA Filogic 830) based access point. > It has 512 MiB of RAM, one 2.5 Gbps PoE (802.3at) Ethernet port and > on-SoC Wi-Fi. > > My unit came with Mediatek's firmware (based on OpenWrt 21.02) > installed. It was possible to simply upgrade using OpenWrt's sysupgrade > tool. > > Another verified upgrade method is using U-Boot (requires UART). During > every boot there is "U-Boot Boot Menu". Selecting option "2. Upgrade > firmware" allows using U-Boot's tftp client to load and flash factory > image. > > Signed-off-by: Rafał Miłecki <rafal@milecki.pl> > --- > .../dts/mt7986a-acelink-ew-7886cax.dts | 236 ++++++++++++++++++ > target/linux/mediatek/image/filogic.mk | 17 ++ > 2 files changed, 253 insertions(+) > create mode 100644 target/linux/mediatek/dts/mt7986a-acelink-ew-7886cax.dts > > diff --git a/target/linux/mediatek/dts/mt7986a-acelink-ew-7886cax.dts b/target/linux/mediatek/dts/mt7986a-acelink-ew-7886cax.dts > new file mode 100644 > index 0000000000..bdbcf1f364 > --- /dev/null > +++ b/target/linux/mediatek/dts/mt7986a-acelink-ew-7886cax.dts > @@ -0,0 +1,236 @@ > +// SPDX-License-Identifier: GPL-2.0-only OR MIT > + > +/dts-v1/; > +#include <dt-bindings/input/input.h> > +#include <dt-bindings/gpio/gpio.h> > +#include <dt-bindings/leds/common.h> > + > +#include "mt7986a.dtsi" > + > +/ { > + model = "Acelink EW-7886CAX"; > + compatible = "acelink,ew-7886cax", "mediatek,mt7986a"; > + > + aliases { > + serial0 = &uart0; > + led-boot = &led_status_blue; > + led-running = &led_status_green; > + led-upgrade = &led_status_red; > + led-failsafe = &led_status_red; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + memory@40000000 { > + reg = <0 0x40000000 0 0x20000000>; > + device_type = "memory"; > + }; > + > + keys { > + compatible = "gpio-keys"; > + > + key-restart { > + label = "Reset"; > + gpios = <&pio 7 GPIO_ACTIVE_LOW>; > + linux,code = <KEY_RESTART>; > + }; > + }; > + > + leds { > + compatible = "gpio-leds"; > + > + led_status_red: led-0 { > + function = LED_FUNCTION_STATUS; > + color = <LED_COLOR_ID_RED>; > + gpios = <&pio 18 GPIO_ACTIVE_HIGH>; > + }; > + > + led_status_green: led-1 { > + function = LED_FUNCTION_STATUS; > + color = <LED_COLOR_ID_GREEN>; > + gpios = <&pio 19 GPIO_ACTIVE_HIGH>; > + }; > + > + led_status_blue: led-2 { > + function = LED_FUNCTION_STATUS; > + color = <LED_COLOR_ID_BLUE>; > + gpios = <&pio 20 GPIO_ACTIVE_HIGH>; > + }; > + }; > +}; > + > +&watchdog { > + status = "okay"; > +}; > + > +&pio { > + spi_flash_pins: spi-flash-pins-33-to-38 { > + mux { > + function = "spi"; > + groups = "spi0", "spi0_wp_hold"; > + }; > + conf-pu { > + pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP"; > + drive-strength = <8>; > + mediatek,pull-up-adv = <0>; /* bias-disable */ > + }; > + conf-pd { > + pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO"; > + drive-strength = <8>; > + mediatek,pull-down-adv = <0>; /* bias-disable */ > + }; > + }; > + > + wf_2g_5g_pins: wf_2g_5g-pins { > + mux { > + function = "wifi"; > + groups = "wf_2g", "wf_5g"; > + }; > + conf { > + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", > + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", > + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", > + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", > + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", > + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", > + "WF1_TOP_CLK", "WF1_TOP_DATA"; > + drive-strength = <4>; > + }; > + }; > + > + wf_dbdc_pins: wf-dbdc-pins { > + mux { > + function = "wifi"; > + groups = "wf_dbdc"; > + }; > + conf { > + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", > + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", > + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", > + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", > + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", > + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", > + "WF1_TOP_CLK", "WF1_TOP_DATA"; > + drive-strength = <4>; > + }; > + }; > +}; > + > +&trng { > + status = "okay"; > +}; > + > +&crypto { > + status = "okay"; > +}; > + > +&uart0 { > + status = "okay"; > +}; > + > +&spi0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&spi_flash_pins>; > + status = "okay"; > + > + flash@0 { > + compatible = "spi-nand"; > + reg = <0>; > + spi-max-frequency = <52000000>; > + spi-tx-bus-width = <4>; > + spi-rx-bus-width = <4>; Did you check whether the stock bootloader is using MediaTek's NMBM bad block relocation mechanism? If so, you should enable it in Linux as well. > + > + #address-cells = <1>; > + #size-cells = <1>; > + > + partitions: partitions { > + compatible = "fixed-partitions"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + partition@0 { > + label = "bootloader"; > + reg = <0x0 0x100000>; > + read-only; > + }; > + > + partition@100000 { > + label = "u-boot-env"; > + reg = <0x100000 0x80000>; > + }; > + > + factory: partition@180000 { > + label = "factory"; > + reg = <0x180000 0x200000>; > + read-only; > + compatible = "nvmem-cells"; > + > + nvmem-layout { > + compatible = "fixed-layout"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + eeprom: eeprom@0 { > + reg = <0x0 0x1000>; > + }; > + > + macaddr: macaddr@4 { > + reg = <0x4 0x6>; > + }; > + }; > + }; > + > + partition@380000 { > + label = "fip"; > + reg = <0x380000 0x200000>; > + }; > + > + partition@580000 { > + label = "ubi"; > + reg = <0x580000 0x4000000>; > + }; > + }; > + }; > +}; > + > +&pcie_phy { > + status = "okay"; > +}; > + > +ð { > + status = "okay"; > + > + mac@1 { > + compatible = "mediatek,eth-mac"; > + reg = <1>; > + phy-mode = "2500base-x"; > + phy-handle = <&phy6>; > + nvmem-cells = <&macaddr>; > + nvmem-cell-names = "mac-address"; Is this the MAC address also printed on the device label? If so, please reference it as label-mac-device in aliases. > + }; > + > + mdio-bus { > + reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>; > + reset-delay-us = <50000>; > + reset-post-delay-us = <20000>; > + > + #address-cells = <1>; > + #size-cells = <0>; > + > + phy6: phy@6 { Maybe add comment here about which kind of PHY that is (MaxLinear? RealTek? Aquantia?). > + compatible = "ethernet-phy-ieee802.3-c45"; > + reg = <6>; > + }; > + }; > +}; > + > +&wifi { > + status = "okay"; > + pinctrl-names = "default", "dbdc"; > + pinctrl-0 = <&wf_2g_5g_pins>; > + pinctrl-1 = <&wf_dbdc_pins>; > + nvmem-cells = <&eeprom>; > + nvmem-cell-names = "eeprom"; > +}; > diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk > index 4d4f3b62a2..c04c952bc5 100644 > --- a/target/linux/mediatek/image/filogic.mk > +++ b/target/linux/mediatek/image/filogic.mk > @@ -105,6 +105,23 @@ define Build/cetron-header > rm $@.tmp > endef > > +define Device/acelink_ew-7886cax > + DEVICE_VENDOR := Acelink > + DEVICE_MODEL := EW-7886CAX > + DEVICE_DTS := mt7986a-acelink-ew-7886cax > + DEVICE_DTS_DIR := ../dts > + DEVICE_PACKAGES := kmod-mt7986-firmware mt7986-wo-firmware > + UBINIZE_OPTS := -E 5 > + BLOCKSIZE := 128k > + PAGESIZE := 2048 > + IMAGE_SIZE := 65536k > + KERNEL_IN_UBI := 1 > + IMAGES += factory.bin > + IMAGE/factory.bin := append-ubi | check-size $$$$(IMAGE_SIZE) > + IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata > +endef > +TARGET_DEVICES += acelink_ew-7886cax > + > define Device/asus_tuf-ax4200 > DEVICE_VENDOR := ASUS > DEVICE_MODEL := TUF-AX4200 > -- > 2.35.3 > > > _______________________________________________ > openwrt-devel mailing list > openwrt-devel@lists.openwrt.org > https://lists.openwrt.org/mailman/listinfo/openwrt-devel
diff --git a/target/linux/mediatek/dts/mt7986a-acelink-ew-7886cax.dts b/target/linux/mediatek/dts/mt7986a-acelink-ew-7886cax.dts new file mode 100644 index 0000000000..bdbcf1f364 --- /dev/null +++ b/target/linux/mediatek/dts/mt7986a-acelink-ew-7886cax.dts @@ -0,0 +1,236 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT + +/dts-v1/; +#include <dt-bindings/input/input.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> + +#include "mt7986a.dtsi" + +/ { + model = "Acelink EW-7886CAX"; + compatible = "acelink,ew-7886cax", "mediatek,mt7986a"; + + aliases { + serial0 = &uart0; + led-boot = &led_status_blue; + led-running = &led_status_green; + led-upgrade = &led_status_red; + led-failsafe = &led_status_red; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@40000000 { + reg = <0 0x40000000 0 0x20000000>; + device_type = "memory"; + }; + + keys { + compatible = "gpio-keys"; + + key-restart { + label = "Reset"; + gpios = <&pio 7 GPIO_ACTIVE_LOW>; + linux,code = <KEY_RESTART>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_status_red: led-0 { + function = LED_FUNCTION_STATUS; + color = <LED_COLOR_ID_RED>; + gpios = <&pio 18 GPIO_ACTIVE_HIGH>; + }; + + led_status_green: led-1 { + function = LED_FUNCTION_STATUS; + color = <LED_COLOR_ID_GREEN>; + gpios = <&pio 19 GPIO_ACTIVE_HIGH>; + }; + + led_status_blue: led-2 { + function = LED_FUNCTION_STATUS; + color = <LED_COLOR_ID_BLUE>; + gpios = <&pio 20 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&watchdog { + status = "okay"; +}; + +&pio { + spi_flash_pins: spi-flash-pins-33-to-38 { + mux { + function = "spi"; + groups = "spi0", "spi0_wp_hold"; + }; + conf-pu { + pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP"; + drive-strength = <8>; + mediatek,pull-up-adv = <0>; /* bias-disable */ + }; + conf-pd { + pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO"; + drive-strength = <8>; + mediatek,pull-down-adv = <0>; /* bias-disable */ + }; + }; + + wf_2g_5g_pins: wf_2g_5g-pins { + mux { + function = "wifi"; + groups = "wf_2g", "wf_5g"; + }; + conf { + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", + "WF1_TOP_CLK", "WF1_TOP_DATA"; + drive-strength = <4>; + }; + }; + + wf_dbdc_pins: wf-dbdc-pins { + mux { + function = "wifi"; + groups = "wf_dbdc"; + }; + conf { + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", + "WF1_TOP_CLK", "WF1_TOP_DATA"; + drive-strength = <4>; + }; + }; +}; + +&trng { + status = "okay"; +}; + +&crypto { + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi_flash_pins>; + status = "okay"; + + flash@0 { + compatible = "spi-nand"; + reg = <0>; + spi-max-frequency = <52000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + + #address-cells = <1>; + #size-cells = <1>; + + partitions: partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "bootloader"; + reg = <0x0 0x100000>; + read-only; + }; + + partition@100000 { + label = "u-boot-env"; + reg = <0x100000 0x80000>; + }; + + factory: partition@180000 { + label = "factory"; + reg = <0x180000 0x200000>; + read-only; + compatible = "nvmem-cells"; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + eeprom: eeprom@0 { + reg = <0x0 0x1000>; + }; + + macaddr: macaddr@4 { + reg = <0x4 0x6>; + }; + }; + }; + + partition@380000 { + label = "fip"; + reg = <0x380000 0x200000>; + }; + + partition@580000 { + label = "ubi"; + reg = <0x580000 0x4000000>; + }; + }; + }; +}; + +&pcie_phy { + status = "okay"; +}; + +ð { + status = "okay"; + + mac@1 { + compatible = "mediatek,eth-mac"; + reg = <1>; + phy-mode = "2500base-x"; + phy-handle = <&phy6>; + nvmem-cells = <&macaddr>; + nvmem-cell-names = "mac-address"; + }; + + mdio-bus { + reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>; + reset-delay-us = <50000>; + reset-post-delay-us = <20000>; + + #address-cells = <1>; + #size-cells = <0>; + + phy6: phy@6 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <6>; + }; + }; +}; + +&wifi { + status = "okay"; + pinctrl-names = "default", "dbdc"; + pinctrl-0 = <&wf_2g_5g_pins>; + pinctrl-1 = <&wf_dbdc_pins>; + nvmem-cells = <&eeprom>; + nvmem-cell-names = "eeprom"; +}; diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk index 4d4f3b62a2..c04c952bc5 100644 --- a/target/linux/mediatek/image/filogic.mk +++ b/target/linux/mediatek/image/filogic.mk @@ -105,6 +105,23 @@ define Build/cetron-header rm $@.tmp endef +define Device/acelink_ew-7886cax + DEVICE_VENDOR := Acelink + DEVICE_MODEL := EW-7886CAX + DEVICE_DTS := mt7986a-acelink-ew-7886cax + DEVICE_DTS_DIR := ../dts + DEVICE_PACKAGES := kmod-mt7986-firmware mt7986-wo-firmware + UBINIZE_OPTS := -E 5 + BLOCKSIZE := 128k + PAGESIZE := 2048 + IMAGE_SIZE := 65536k + KERNEL_IN_UBI := 1 + IMAGES += factory.bin + IMAGE/factory.bin := append-ubi | check-size $$$$(IMAGE_SIZE) + IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata +endef +TARGET_DEVICES += acelink_ew-7886cax + define Device/asus_tuf-ax4200 DEVICE_VENDOR := ASUS DEVICE_MODEL := TUF-AX4200