diff mbox series

[1/2] ipq40xx: net: phy: qca807x: fix GPIO driver

Message ID 20210304113831.2893318-1-robert.marko@sartura.hr
State Accepted, archived
Headers show
Series [1/2] ipq40xx: net: phy: qca807x: fix GPIO driver | expand

Commit Message

Robert Marko March 4, 2021, 11:38 a.m. UTC
While rebasing into setting bits instead of magic values,
I accidentally forgot to actually set the force bit.

Without it using the pins as GPIO-s did not actually work.

Fixes: b5c93ed ("ipq40xx: add Qualcomm QCA807x driver")

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
---
 target/linux/ipq40xx/files/drivers/net/phy/qca807x.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Christian Lamparter March 4, 2021, 1:21 p.m. UTC | #1
Hello,

is there a PATCH 2/2 for ipq40xx too? Or was that 1/2 in the subject
just because the file got copied around?

Cheers
Christian
Robert Marko March 4, 2021, 1:36 p.m. UTC | #2
It's my fault, I exported it as a part of the patch series with
unrelated patches and git-send much have picked that up.
There is no 2/2.

Do you want me to export it again and resend it?

Regards


On Thu, Mar 4, 2021 at 2:21 PM Christian Lamparter <chunkeey@gmail.com> wrote:
>
> Hello,
>
> is there a PATCH 2/2 for ipq40xx too? Or was that 1/2 in the subject
> just because the file got copied around?
>
> Cheers
> Christian
Christian Lamparter March 4, 2021, 2:26 p.m. UTC | #3
On 04/03/2021 14:36, Robert Marko wrote:
> It's my fault, I exported it as a part of the patch series with
> unrelated patches and git-send much have picked that up.
> There is no 2/2.
> 
> Do you want me to export it again and resend it?

Oh no, that's certainly not necessary ;)

Cheers,
Christian
diff mbox series

Patch

diff --git a/target/linux/ipq40xx/files/drivers/net/phy/qca807x.c b/target/linux/ipq40xx/files/drivers/net/phy/qca807x.c
index 10d38d94a6..16d7a80455 100644
--- a/target/linux/ipq40xx/files/drivers/net/phy/qca807x.c
+++ b/target/linux/ipq40xx/files/drivers/net/phy/qca807x.c
@@ -356,6 +356,7 @@  static void qca807x_gpio_set(struct gpio_chip *gc, unsigned int offset, int valu
 
 	val = phy_read_mmd(priv->phy, MDIO_MMD_AN, qca807x_gpio_get_reg(offset));
 	val &= ~QCA807X_GPIO_FORCE_MODE_MASK;
+	val |= QCA807X_GPIO_FORCE_EN;
 	val |= FIELD_PREP(QCA807X_GPIO_FORCE_MODE_MASK, value);
 
 	phy_write_mmd(priv->phy, MDIO_MMD_AN, qca807x_gpio_get_reg(offset), val);