Message ID | 20200617173510.124628-1-rsalvaterra@gmail.com |
---|---|
State | Superseded |
Headers | show |
Series | [OpenWrt-Devel,RFC] mvebu: compile the kernel in Thumb-2 mode for ARMv7 targets | expand |
Please ignore this one, I'll send an updated patch shortly (only for 5.4, which I've tested). On Wed, 17 Jun 2020 at 18:37, Rui Salvaterra <rsalvaterra@gmail.com> wrote: > > (Sending as RFC due to the note below.) > > The Thumb-2 instruction set generates denser code, allowing for more efficient > use of the cache and consequently higher execution performance. > > NOTE: This requires enabling a linker workaround to avoid the emission of > R_ARM_THM_JUMP11 relocations [1] in modules, which the kernel doesn't support. > Since this effectively implies -fno-optimize-sibling-calls [2], we're generating > suboptimal code. While compat modules load and run correctly without this > workaround, WireGuard fails to load with an unknown relocation 102 error. > > [1] https://static.docs.arm.com/ihi0044/e/IHI0044E_aaelf.pdf (page 28) > [2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/arch/arm/Makefile?h=linux-5.4.y#n129 > > Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com> > --- > target/linux/mvebu/cortexa9/config-default | 2 ++ > 1 file changed, 2 insertions(+) > create mode 100644 target/linux/mvebu/cortexa9/config-default > > diff --git a/target/linux/mvebu/cortexa9/config-default b/target/linux/mvebu/cortexa9/config-default > new file mode 100644 > index 0000000000..6aff77fda7 > --- /dev/null > +++ b/target/linux/mvebu/cortexa9/config-default > @@ -0,0 +1,2 @@ > +CONFIG_THUMB2_AVOID_R_ARM_THM_JUMP11=y > +CONFIG_THUMB2_KERNEL=y > -- > 2.27.0 >
diff --git a/target/linux/mvebu/cortexa9/config-default b/target/linux/mvebu/cortexa9/config-default new file mode 100644 index 0000000000..6aff77fda7 --- /dev/null +++ b/target/linux/mvebu/cortexa9/config-default @@ -0,0 +1,2 @@ +CONFIG_THUMB2_AVOID_R_ARM_THM_JUMP11=y +CONFIG_THUMB2_KERNEL=y
(Sending as RFC due to the note below.) The Thumb-2 instruction set generates denser code, allowing for more efficient use of the cache and consequently higher execution performance. NOTE: This requires enabling a linker workaround to avoid the emission of R_ARM_THM_JUMP11 relocations [1] in modules, which the kernel doesn't support. Since this effectively implies -fno-optimize-sibling-calls [2], we're generating suboptimal code. While compat modules load and run correctly without this workaround, WireGuard fails to load with an unknown relocation 102 error. [1] https://static.docs.arm.com/ihi0044/e/IHI0044E_aaelf.pdf (page 28) [2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/arch/arm/Makefile?h=linux-5.4.y#n129 Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com> --- target/linux/mvebu/cortexa9/config-default | 2 ++ 1 file changed, 2 insertions(+) create mode 100644 target/linux/mvebu/cortexa9/config-default