diff mbox series

[OpenWrt-Devel] kernel: fix hw-crypto detection of qce driver

Message ID 20190920204804.10183-1-cotequeiroz@gmail.com
State Accepted, archived
Delegated to: Christian Lamparter
Headers show
Series [OpenWrt-Devel] kernel: fix hw-crypto detection of qce driver | expand

Commit Message

Eneas U de Queiroz Sept. 20, 2019, 8:48 p.m. UTC
This adds the CRYPTO_ALG_KERN_DRIVER_ONLY flag to Qualcomm crypto engine
driver algorithms, so that openssl devcrypto can recognize them as
hardware-accelerated.

Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>

--

It was reported to me at the forum:
https://forum.openwrt.org/t/comparing-cpu-soc-performance/36115/20

I have submitted the patch upstream, but haven't got any feedback yet.

This is a basic fix.  Nonetheless, I need someone with access to
Qualcomm Ahteros IPQ40XX/IPQ806X to confirm that it works.  I've
successfully compile-tested it for both targets.

The output of 'openssl engine -pre DUMP_INFO devcrypto' should show the
*-qce drivers as (hw accelerated), instead of (software).

The 4.14 patch should be cherry-picked to openwrt-19.07, and I will send
a patch for it after this is merged unless someone tell me otherwise.

Comments

Eneas U de Queiroz Sept. 23, 2019, 12:28 p.m. UTC | #1
On Fri, Sep 20, 2019 at 5:48 PM Eneas U de Queiroz
<cotequeiroz@gmail.com> wrote:
>
> This adds the CRYPTO_ALG_KERN_DRIVER_ONLY flag to Qualcomm crypto engine
> driver algorithms, so that openssl devcrypto can recognize them as
> hardware-accelerated.
>
> Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>

I noticed this was moved to ipq40xx, but ipq806x is also enabling the
qce driver:
https://git.openwrt.org/?p=openwrt/openwrt.git;a=blob;f=target/linux/ipq806x/config-4.14#l119

So I imagine we need to either copy the patch to ipq806x, or disable
the qce driver in ipq806x/config-4.14.  I don't have enough knowledge
to decide what to do, so can someone more knowledgeable, please,
either do it or point me to the right direction.

Cheers,

Eneas
Rosen Penev Sept. 23, 2019, 5:12 p.m. UTC | #2
On Mon, Sep 23, 2019 at 5:28 AM Eneas Queiroz <cotequeiroz@gmail.com> wrote:
>
> On Fri, Sep 20, 2019 at 5:48 PM Eneas U de Queiroz
> <cotequeiroz@gmail.com> wrote:
> >
> > This adds the CRYPTO_ALG_KERN_DRIVER_ONLY flag to Qualcomm crypto engine
> > driver algorithms, so that openssl devcrypto can recognize them as
> > hardware-accelerated.
> >
> > Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>
>
> I noticed this was moved to ipq40xx, but ipq806x is also enabling the
> qce driver:
> https://git.openwrt.org/?p=openwrt/openwrt.git;a=blob;f=target/linux/ipq806x/config-4.14#l119
>
> So I imagine we need to either copy the patch to ipq806x, or disable
> the qce driver in ipq806x/config-4.14.  I don't have enough knowledge
> to decide what to do, so can someone more knowledgeable, please,
> either do it or point me to the right direction.
Probably a mistake from the splitting of ipq targets (used to be just one).

Also see:

https://github.com/openwrt/openwrt/commit/fff65dbe2436351ea1feee6c79110971ec4d5881
>
> Cheers,
>
> Eneas
>
> _______________________________________________
> openwrt-devel mailing list
> openwrt-devel@lists.openwrt.org
> https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Christian Lamparter Sept. 23, 2019, 6:39 p.m. UTC | #3
On Mon, Sep 23, 2019 at 2:28 PM Eneas Queiroz <cotequeiroz@gmail.com> wrote:
>
> On Fri, Sep 20, 2019 at 5:48 PM Eneas U de Queiroz
> <cotequeiroz@gmail.com> wrote:
> >
> > This adds the CRYPTO_ALG_KERN_DRIVER_ONLY flag to Qualcomm crypto engine
> > driver algorithms, so that openssl devcrypto can recognize them as
> > hardware-accelerated.
> >
> > Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>
>
> I noticed this was moved to ipq40xx, but ipq806x is also enabling the
> qce driver:
> https://git.openwrt.org/?p=openwrt/openwrt.git;a=blob;f=target/linux/ipq806x/config-4.14#l119
>
> So I imagine we need to either copy the patch to ipq806x, or disable
> the qce driver in ipq806x/config-4.14.  I don't have enough knowledge
> to decide what to do, so can someone more knowledgeable, please,
> either do it or point me to the right direction.

The upstream qce crypto driver does not support the IPQ806x series.
The ipq806x target used to host ipq40xx, so this driver was enabled as
builtin back then.
But since ipq40xx moved out, it's has become a symbol of "hope"....
That maybe some day
the NSS support of the IPQ806x can make use of it....

So yeah, if you want to crush the hopes and dreams of the IPQ806X users,
you can disable/remove the driver for the ipq806x target.

Regards,
Christian
Eneas U de Queiroz Sept. 23, 2019, 8:54 p.m. UTC | #4
On Mon, Sep 23, 2019 at 2:12 PM Rosen Penev <rosenp@gmail.com> wrote:
>
> On Mon, Sep 23, 2019 at 5:28 AM Eneas Queiroz <cotequeiroz@gmail.com> wrote:
> >
> > On Fri, Sep 20, 2019 at 5:48 PM Eneas U de Queiroz
> > <cotequeiroz@gmail.com> wrote:
> > >
> > > This adds the CRYPTO_ALG_KERN_DRIVER_ONLY flag to Qualcomm crypto engine
> > > driver algorithms, so that openssl devcrypto can recognize them as
> > > hardware-accelerated.
> > >
> > > Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>
> >
> > I noticed this was moved to ipq40xx, but ipq806x is also enabling the
> > qce driver:
> > https://git.openwrt.org/?p=openwrt/openwrt.git;a=blob;f=target/linux/ipq806x/config-4.14#l119
> >
> > So I imagine we need to either copy the patch to ipq806x, or disable
> > the qce driver in ipq806x/config-4.14.  I don't have enough knowledge
> > to decide what to do, so can someone more knowledgeable, please,
> > either do it or point me to the right direction.
> Probably a mistake from the splitting of ipq targets (used to be just one).
>
> Also see:
>
> https://github.com/openwrt/openwrt/commit/fff65dbe2436351ea1feee6c79110971ec4d5881

I thought about that, but then I saw the specs here:
https://www.qualcomm.com/products/ipq8064
It does list the crypto engine for ipq8064, but not for the rest of
the ipq806x family.
diff mbox series

Patch

diff --git a/target/linux/generic/pending-4.14/181-crypto-qce-add-CRYPTO_ALG_KERN_DRIVER_ONLY-flag.patch b/target/linux/generic/pending-4.14/181-crypto-qce-add-CRYPTO_ALG_KERN_DRIVER_ONLY-flag.patch
new file mode 100644
index 0000000000..71ed00af22
--- /dev/null
+++ b/target/linux/generic/pending-4.14/181-crypto-qce-add-CRYPTO_ALG_KERN_DRIVER_ONLY-flag.patch
@@ -0,0 +1,31 @@ 
+From: Eneas U de Queiroz <cotequeiroz@gmail.com>
+Subject: [PATCH] crypto: qce - add CRYPTO_ALG_KERN_DRIVER_ONLY flag
+
+Set the CRYPTO_ALG_KERN_DRIVER_ONLY flag to all algorithms exposed by
+the qce driver, since they are all hardware accelerated, accessible
+through a kernel driver only, and not available directly to userspace.
+
+Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>
+
+--- a/drivers/crypto/qce/ablkcipher.c
++++ b/drivers/crypto/qce/ablkcipher.c
+@@ -373,7 +373,7 @@ static int qce_ablkcipher_register_one(const struct qce_ablkcipher_def *def,
+ 
+ 	alg->cra_priority = 300;
+ 	alg->cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC |
+-			 CRYPTO_ALG_NEED_FALLBACK;
++			 CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_KERN_DRIVER_ONLY;
+ 	alg->cra_ctxsize = sizeof(struct qce_cipher_ctx);
+ 	alg->cra_alignmask = 0;
+ 	alg->cra_type = &crypto_ablkcipher_type;
+--- a/drivers/crypto/qce/sha.c
++++ b/drivers/crypto/qce/sha.c
+@@ -526,7 +526,7 @@ static int qce_ahash_register_one(const struct qce_ahash_def *def,
+ 	base = &alg->halg.base;
+ 	base->cra_blocksize = def->blocksize;
+ 	base->cra_priority = 300;
+-	base->cra_flags = CRYPTO_ALG_ASYNC;
++	base->cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY;
+ 	base->cra_ctxsize = sizeof(struct qce_sha_ctx);
+ 	base->cra_alignmask = 0;
+ 	base->cra_module = THIS_MODULE;
diff --git a/target/linux/generic/pending-4.19/181-crypto-qce-add-CRYPTO_ALG_KERN_DRIVER_ONLY-flag.patch b/target/linux/generic/pending-4.19/181-crypto-qce-add-CRYPTO_ALG_KERN_DRIVER_ONLY-flag.patch
new file mode 100644
index 0000000000..b542885d38
--- /dev/null
+++ b/target/linux/generic/pending-4.19/181-crypto-qce-add-CRYPTO_ALG_KERN_DRIVER_ONLY-flag.patch
@@ -0,0 +1,31 @@ 
+From: Eneas U de Queiroz <cotequeiroz@gmail.com>
+Subject: [PATCH] crypto: qce - add CRYPTO_ALG_KERN_DRIVER_ONLY flag
+
+Set the CRYPTO_ALG_KERN_DRIVER_ONLY flag to all algorithms exposed by
+the qce driver, since they are all hardware accelerated, accessible
+through a kernel driver only, and not available directly to userspace.
+
+Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>
+
+--- a/drivers/crypto/qce/ablkcipher.c
++++ b/drivers/crypto/qce/ablkcipher.c
+@@ -370,7 +370,7 @@ static int qce_ablkcipher_register_one(const struct qce_ablkcipher_def *def,
+ 
+ 	alg->cra_priority = 300;
+ 	alg->cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC |
+-			 CRYPTO_ALG_NEED_FALLBACK;
++			 CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_KERN_DRIVER_ONLY;
+ 	alg->cra_ctxsize = sizeof(struct qce_cipher_ctx);
+ 	alg->cra_alignmask = 0;
+ 	alg->cra_type = &crypto_ablkcipher_type;
+--- a/drivers/crypto/qce/sha.c
++++ b/drivers/crypto/qce/sha.c
+@@ -503,7 +503,7 @@ static int qce_ahash_register_one(const struct qce_ahash_def *def,
+ 	base = &alg->halg.base;
+ 	base->cra_blocksize = def->blocksize;
+ 	base->cra_priority = 300;
+-	base->cra_flags = CRYPTO_ALG_ASYNC;
++	base->cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY;
+ 	base->cra_ctxsize = sizeof(struct qce_sha_ctx);
+ 	base->cra_alignmask = 0;
+ 	base->cra_module = THIS_MODULE;