@@ -1,4 +1,5 @@
CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_ALTERA_PR_IP_CORE is not set
CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
@@ -236,6 +237,14 @@ CONFIG_FHANDLE=y
CONFIG_FIRMWARE_IN_KERNEL=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
+CONFIG_FPGA=y
+CONFIG_FPGA_BRIDGE=y
+# CONFIG_FPGA_MGR_ALTERA_CVP is not set
+# CONFIG_FPGA_MGR_ALTERA_PS_SPI is not set
+# CONFIG_FPGA_MGR_ICE40_SPI is not set
+# CONFIG_FPGA_MGR_XILINX_SPI is not set
+CONFIG_FPGA_MGR_ZYNQ_FPGA=y
+CONFIG_FPGA_REGION=y
CONFIG_FREEZER=y
CONFIG_FS_MBCACHE=y
CONFIG_GENERIC_ALLOCATOR=y
@@ -709,6 +718,7 @@ CONFIG_WATCHDOG_CORE=y
# CONFIG_WIRELESS_EXT is not set
# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
CONFIG_XILINX_EMACLITE=y
+# CONFIG_XILINX_PR_DECOUPLER is not set
CONFIG_XILINX_WATCHDOG=y
CONFIG_XILINX_XADC=y
CONFIG_XPS=y
These configs are necessary to program the FPGA fabric Signed-off-by: Luis Araneda <luaraneda@gmail.com> --- Creates an FPGA region that can be programmed by the FPGA manager Run-tested on a Zybo Z7 board --- target/linux/zynq/config-4.14 | 10 ++++++++++ 1 file changed, 10 insertions(+)