From patchwork Sat Dec 27 10:32:17 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sylwester Petela X-Patchwork-Id: 424180 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from arrakis.dune.hu (arrakis.dune.hu [78.24.191.176]) (using TLSv1.1 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 82DC114007F for ; Sat, 27 Dec 2014 21:33:10 +1100 (AEDT) Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id E615228BD8F; Sat, 27 Dec 2014 11:30:43 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on arrakis.dune.hu X-Spam-Level: X-Spam-Status: No, score=-1.5 required=5.0 tests=BAYES_00,FREEMAIL_FROM, T_DKIM_INVALID autolearn=unavailable version=3.3.2 Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id 4CC9528BC74 for ; Sat, 27 Dec 2014 11:30:19 +0100 (CET) X-policyd-weight: using cached result; rate: -8.5 Received: from mail-wi0-f177.google.com (mail-wi0-f177.google.com [209.85.212.177]) by arrakis.dune.hu (Postfix) with ESMTPS for ; Sat, 27 Dec 2014 11:30:18 +0100 (CET) Received: by mail-wi0-f177.google.com with SMTP id l15so18445474wiw.16 for ; Sat, 27 Dec 2014 02:32:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=date:from:to:subject:message-id:mime-version:content-type :content-transfer-encoding; bh=kok9AZpsWoFr31loLWIepa/eYbkVtak5b/biWiwzZmo=; b=EH2hWFS6i9Rr9EWfDiTVRHzgUlGqF5IUkF8BlhTG5ZMwVVJ9siArY5ZZZAQNtU8EOi Ni2O7h6t87OPnZdn3tVEw8gs+S3S/6wMzFFkQZkfJcxPpwIX6Xie1DADqNr+biPoMZL1 2kTRrdya9DtwoYQUdAeSE61eZAdgKnybAGZJZFc5h5Oqbc6x+M4hKW7kptb4aTZv5tM1 XG3AAkbBJnijcxeXIllzvMPV42KG5+tO7roOWWD9tl1wtfPDDV/haRmWSqeTLGW2Gb3U xn50/qKKC3Pyp9wAWSdmXaWksmlbcrRSi/krCgvEG0axRE+apXtcbcq1AAD/sbKOOgC6 iZEg== X-Received: by 10.180.75.42 with SMTP id z10mr76706742wiv.70.1419676337133; Sat, 27 Dec 2014 02:32:17 -0800 (PST) Received: from localhost (ers223.neoplus.adsl.tpnet.pl. [83.20.112.223]) by mx.google.com with ESMTPSA id ud4sm31339747wib.0.2014.12.27.02.32.15 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 27 Dec 2014 02:32:16 -0800 (PST) Date: Sat, 27 Dec 2014 11:32:17 +0100 From: Sylwester Petela To: OpenWRT-devel Message-ID: <20141227113217.00006c9c@gmail.com> X-Mailer: Claws Mail 3.10.1 (GTK+ 2.16.6; i586-pc-mingw32msvc) MIME-Version: 1.0 Subject: [OpenWrt-Devel] [PATCH 2/3] [Lantiq] [P2812HNUFX] Add separate dts for P2812HNUF1 and P2812HNUF3 X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: openwrt-devel-bounces@lists.openwrt.org Sender: "openwrt-devel" Add separate dts for P2812HNUF1 and P2812HNUF3. Signed-off-by: Sylwester Petela --- /dev/null +++ b/target/linux/lantiq/dts/P2812HNUF1.dts @@ -0,0 +1,336 @@ +/dts-v1/; + +/include/ "vr9.dtsi" + +/ { + model = "P2812HNUF1 - ZyXEL P-2812HNU-F1"; + + chosen { + bootargs = "console=ttyLTQ0,115200 init=/etc/preinit"; + }; + + memory@0 { + reg = <0x0 0x8000000>; + }; + + fpi@10000000 { + localbus@0 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "lantiq,localbus", "simple-bus"; + ranges = <0 0 0x4000000 0x3ffffff>; + + nand-parts@0 { + compatible = "gen_nand", "lantiq,nand-xway"; + lantiq,cs = <1>; + bank-width = <2>; + reg = <0 0x0 0x2000000>; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x40000>; + }; + + partition@40000 { + label = "uboot-env"; + reg = <0x40000 0x20000>; + }; + + partition@60000 { + label = "kernel"; + reg = <0x60000 0x200000>; + }; + + partition@260000 { + label = "ubi"; + reg = <0x260000 0x7da0000>; + }; + }; + }; + + gpio: pinmux@E100B10 { + compatible = "lantiq,pinctrl-xr9"; + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + interrupt-parent = <&icu0>; + interrupts = <166 135 66 40 41 42 38>; + #gpio-cells = <2>; + gpio-controller; + reg = <0xE100B10 0xA0>; + state_default: pinmux { + mdio { + lantiq,groups = "mdio"; + lantiq,function = "mdio"; + }; + gphy-leds { + lantiq,groups = "gphy0 led1", "gphy1 led1", + "gphy0 led2", "gphy1 led2"; + lantiq,function = "gphy"; + lantiq,pull = <2>; + lantiq,open-drain = <0>; + lantiq,output = <1>; + }; + stp { + lantiq,groups = "stp"; + lantiq,function = "stp"; + lantiq,pull = <2>; + lantiq,open-drain = <0>; + lantiq,output = <1>; + }; + pci-in { + lantiq,groups = "req1"; + lantiq,function = "pci"; + lantiq,output = <0>; + lantiq,open-drain = <1>; + lantiq,pull = <2>; + }; + pci-out { + lantiq,groups = "gnt1"; + lantiq,function = "pci"; + lantiq,output = <1>; + lantiq,open-drain = <0>; + lantiq,pull = <0>; + }; + pci_rst { + lantiq,pins = "io21"; + lantiq,output = <1>; + lantiq,open-drain = <0>; + }; + ifxhcd-rst { + lantiq,pins = "io33"; + lantiq,pull = <0>; + lantiq,open-drain = <0>; + lantiq,output = <1>; + }; + nand_out { + lantiq,groups = "nand cle", "nand ale"; + lantiq,function = "ebu"; + lantiq,output = <1>; + lantiq,open-drain = <0>; + lantiq,pull = <0>; + }; + nand_cs1 { + lantiq,groups = "nand cs1"; + lantiq,function = "ebu"; + lantiq,open-drain = <0>; + lantiq,pull = <0>; + }; + }; + }; + + eth@E108000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "lantiq,xrx200-net"; + reg = <0xE108000 0x3000 /* switch */ + 0xE10B100 0x70 /* mdio */ + 0xE10B1D8 0x30 /* mii */ + 0xE10B308 0x30 /* pmac */ + >; + interrupt-parent = <&icu0>; + interrupts = <73 72>; + + lan: interface@0 { + compatible = "lantiq,xrx200-pdi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + mac-address = [ 00 11 22 33 44 55 ]; + lantiq,switch; + + ethernet@0 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <0>; + phy-mode = "rgmii"; + phy-handle = <&phy0>; + }; + ethernet@1 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <1>; + phy-mode = "rgmii"; + phy-handle = <&phy1>; + }; + ethernet@2 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <2>; + phy-mode = "gmii"; + phy-handle = <&phy11>; + }; + ethernet@4 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <4>; + phy-mode = "gmii"; + phy-handle = <&phy13>; + }; + ethernet@5 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <5>; + phy-mode = "rgmii"; + phy-handle = <&phy5>; + }; + }; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "lantiq,xrx200-mdio"; + phy0: ethernet-phy@0 { + reg = <0x0>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy1: ethernet-phy@1 { + reg = <0x1>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy5: ethernet-phy@5 { + reg = <0x5>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy11: ethernet-phy@11 { + reg = <0x11>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy13: ethernet-phy@13 { + reg = <0x13>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + }; + }; + + stp: stp@E100BB0 { + compatible = "lantiq,gpio-stp-xway"; + reg = <0xE100BB0 0x40>; + #gpio-cells = <2>; + gpio-controller; + + lantiq,shadow = <0xffffff>; + lantiq,groups = <0x7>; + /* + lantiq,dsl = <0x3>; + lantiq,phy1 = <0x7>; + lantiq,phy2 = <0x7>; + */ + }; + + ifxhcd@E101000 { + status = "okay"; + gpios = <&gpio 33 0>; + lantiq,portmask = <0x3>; + }; + + pci@E105400 { + status = "okay"; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + compatible = "lantiq,pci-xway"; + bus-range = <0x0 0x0>; + ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */ + 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */ + reg = <0x7000000 0x8000 /* config space */ + 0xE105400 0x400>; /* pci bridge */ + lantiq,bus-clock = <33333333>; + /*lantiq,external-clock;*/ + lantiq,delay-hi = <0>; /* 0ns delay */ + lantiq,delay-lo = <0>; /* 0.0ns delay */ + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + 0x7000 0 0 1 &icu0 30 1 // slot 14, irq 30 + >; + gpio-reset = <&gpio 21 0>; + req-mask = <0x1>; /* GNT1 */ + }; + + pcie@d900000 { + status = "disabled"; + }; + + }; + + gphy-xrx200 { + compatible = "lantiq,phy-xrx200"; + firmware1 = "lantiq/vr9_phy11g_a1x.bin"; /*VR9 1.1*/ + firmware2 = "lantiq/vr9_phy11g_a2x.bin"; /*VR9 1.2*/ + phys = [ 00 01 ]; + }; + + ralink_eep { + compatible = "ralink,eeprom"; + ralink,eeprom = "RT2860.eeprom"; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + reset { + label = "reset"; + gpios = <&gpio 39 1>; + linux,code = <0x198>; + }; + rfkill { + label = "rfkill"; + gpios = <&gpio 1 1>; + linux,code = <0xf7>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + internet2 { + label = "internet2"; + gpios = <&stp 16 1>; + }; + internet { + label = "internet"; + gpios = <&stp 17 1>; + }; + dsl { + label = "dsl"; + gpios = <&stp 18 1>; + }; + dsl2 { + label = "dsl2"; + gpios = <&stp 19 1>; + }; + wifi2 { + label = "wifi2"; + gpios = <&stp 20 1>; + }; + wifi { + label = "wifi"; + gpios = <&stp 21 1>; + }; + power2 { + label = "power2"; + gpios = <&stp 22 1>; + }; + power { + label = "power"; + gpios = <&stp 23 1>; + default-state = "on"; + }; + phone1 { + label = "phone1"; + gpios = <&gpio 11 1>; + }; + phone1warn { + label = "phone1warn"; + gpios = <&gpio 12 1>; + }; + phone2 { + label = "phone2"; + gpios = <&gpio 28 1>; + }; + phone2warn { + label = "phone2warn"; + gpios = <&gpio 26 1>; + }; + + }; +}; --- /dev/null +++ b/target/linux/lantiq/dts/P2812HNUF3.dts @@ -0,0 +1,345 @@ +/dts-v1/; + +/include/ "vr9.dtsi" + +/ { + model = "P2812HNUF3 - ZyXEL P-2812HNU-F3"; + + chosen { + bootargs = "console=ttyLTQ0,115200 init=/etc/preinit"; + }; + + memory@0 { + reg = <0x0 0x8000000>; + }; + + fpi@10000000 { + localbus@0 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "lantiq,localbus", "simple-bus"; + ranges = <0 0 0x0 0x3ffffff /* addrsel0 */ + 1 0 0x4000000 0x4000010>; /* addsel1 */ + nor-boot@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x800000>; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x50000>; + read-only; + }; + + partition@50000 { + label = "uboot-env"; + reg = <0x50000 0x20000>; + }; + + partition@70000 { + label = "unused"; + reg = <0x70000 0x790000>; + }; + }; + + nand-parts@0 { + compatible = "gen_nand", "lantiq,nand-xway"; + lantiq,cs = <1>; + bank-width = <2>; + reg = <1 0x0 0x2000000>; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "kernel"; + reg = <0x00000 0x200000>; + }; + + partition@200000 { + label = "ubi"; + reg = <0x200000 0x7e00000>; + }; + }; + }; + + gpio: pinmux@E100B10 { + compatible = "lantiq,pinctrl-xr9"; + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + interrupt-parent = <&icu0>; + interrupts = <166 135 66 40 41 42 38>; + + #gpio-cells = <2>; + gpio-controller; + reg = <0xE100B10 0xA0>; + + state_default: pinmux { + exin3 { + lantiq,groups = "exin3"; + lantiq,function = "exin"; + }; + mdio { + lantiq,groups = "mdio"; + lantiq,function = "mdio"; + }; + gphy-leds { + lantiq,groups = "gphy0 led1", "gphy1 led1", + "gphy0 led2", "gphy1 led2"; + lantiq,function = "gphy"; + lantiq,pull = <2>; + lantiq,open-drain = <0>; + lantiq,output = <1>; + }; + stp { + lantiq,groups = "stp"; + lantiq,function = "stp"; + lantiq,pull = <2>; + lantiq,open-drain = <0>; + lantiq,output = <1>; + }; + pci-in { + lantiq,groups = "req1"; + lantiq,function = "pci"; + lantiq,output = <0>; + lantiq,open-drain = <1>; + lantiq,pull = <2>; + }; + pci-out { + lantiq,groups = "gnt1"; + lantiq,function = "pci"; + lantiq,output = <1>; + lantiq,open-drain = <0>; + lantiq,pull = <0>; + }; + pci_rst { + lantiq,pins = "io21"; + lantiq,output = <1>; + lantiq,open-drain = <0>; + }; + ifxhcd-rst { + lantiq,pins = "io33"; + lantiq,pull = <0>; + lantiq,open-drain = <0>; + lantiq,output = <1>; + }; + nand_out { + lantiq,groups = "nand cle", "nand ale"; + lantiq,function = "ebu"; + lantiq,output = <1>; + lantiq,open-drain = <0>; + lantiq,pull = <0>; + }; + nand_cs1 { + lantiq,groups = "nand cs1"; + lantiq,function = "ebu"; + lantiq,open-drain = <0>; + lantiq,pull = <0>; + }; + }; + }; + + eth@E108000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "lantiq,xrx200-net"; + reg = < 0xE108000 0x3000 /* switch */ + 0xE10B100 0x70 /* mdio */ + 0xE10B1D8 0x30 /* mii */ + 0xE10B308 0x30 /* pmac */ + >; + interrupt-parent = <&icu0>; + interrupts = <73 72>; + + lan: interface@0 { + compatible = "lantiq,xrx200-pdi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + mac-address = [ 00 11 22 33 44 55 ]; + lantiq,switch; + + ethernet@0 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <0>; + phy-mode = "rgmii"; + phy-handle = <&phy0>; + }; + ethernet@1 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <1>; + phy-mode = "rgmii"; + phy-handle = <&phy1>; + }; + ethernet@2 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <2>; + phy-mode = "gmii"; + phy-handle = <&phy11>; + }; + ethernet@4 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <4>; + phy-mode = "gmii"; + phy-handle = <&phy13>; + }; + ethernet@5 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <5>; + phy-mode = "rgmii"; + phy-handle = <&phy5>; + }; + }; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "lantiq,xrx200-mdio"; + phy0: ethernet-phy@0 { + reg = <0x0>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy1: ethernet-phy@1 { + reg = <0x1>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy5: ethernet-phy@5 { + reg = <0x5>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy11: ethernet-phy@11 { + reg = <0x11>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy13: ethernet-phy@13 { + reg = <0x13>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + }; + }; + + stp: stp@E100BB0 { + compatible = "lantiq,gpio-stp-xway"; + reg = <0xE100BB0 0x40>; + #gpio-cells = <2>; + gpio-controller; + + lantiq,shadow = <0xffffff>; + lantiq,groups = <0x7>; + /* + lantiq,dsl = <0x3>; + lantiq,phy1 = <0x7>; + lantiq,phy2 = <0x7>; + */ + }; + + ifxhcd@E101000 { + status = "okay"; + gpios = <&gpio 33 0>; + lantiq,portmask = <0x3>; + }; + + pci@E105400 { + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + compatible = "lantiq,pci-xway"; + bus-range = <0x0 0x0>; + ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */ + 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */ + reg = <0x7000000 0x8000 /* config space */ + 0xE105400 0x400>; /* pci bridge */ + lantiq,bus-clock = <33333333>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + 0x7000 0 0 1 &icu0 30 1 // slot 14, irq 30 + >; + gpios-reset = <&gpio 21 0>; + req-mask = <0x1>; /* GNT1 */ + }; + }; + + gphy-xrx200 { + compatible = "lantiq,phy-xrx200"; + firmware1 = "lantiq/vr9_phy11g_a1x.bin"; /*VR9 1.1*/ + firmware2 = "lantiq/vr9_phy11g_a2x.bin"; /*VR9 1.2*/ + phys = [ 00 01 ]; + }; + + ralink_eep { + compatible = "ralink,eeprom"; + ralink,eeprom = "RT3092.eeprom"; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + reset { + label = "reset"; + gpios = <&gpio 39 1>; + linux,code = <0x198>; + }; + rfkill { + label = "rfkill"; + gpios = <&gpio 1 1>; + linux,code = <0xf7>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + internet2 { + label = "internet2"; + gpios = <&stp 16 1>; + }; + internet { + label = "internet"; + gpios = <&stp 17 1>; + }; + dsl { + label = "dsl"; + gpios = <&stp 18 1>; + }; + dsl2 { + label = "dsl2"; + gpios = <&stp 19 1>; + }; + wifi2 { + label = "wifi2"; + gpios = <&stp 20 1>; + }; + wifi { + label = "wifi"; + gpios = <&stp 21 1>; + }; + power2 { + label = "power2"; + gpios = <&stp 22 1>; + }; + power { + label = "power"; + gpios = <&stp 23 1>; + }; + phone1 { + label = "phone1"; + gpios = <&gpio 11 1>; + }; + phone1warn { + label = "phone1warn"; + gpios = <&gpio 12 1>; + }; + phone2 { + label = "phone2"; + gpios = <&gpio 28 1>; + }; + phone2warn { + label = "phone2warn"; + gpios = <&gpio 26 1>; + }; + }; +};