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[77.13.83.92]) by smtp.gmail.com with ESMTPSA id w125sm13341572wmw.18.2016.03.21.10.01.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 21 Mar 2016 10:01:46 -0700 (PDT) From: Sven Eckelmann X-Google-Original-From: Sven Eckelmann To: openwrt-devel@lists.openwrt.org Date: Mon, 21 Mar 2016 18:01:36 +0100 Message-Id: <1458579696-14013-2-git-send-email-sven@open-mesh.com> X-Mailer: git-send-email 2.8.0.rc3 In-Reply-To: <1458579696-14013-1-git-send-email-sven@open-mesh.com> References: <1458579696-14013-1-git-send-email-sven@open-mesh.com> Subject: [OpenWrt-Devel] [PATCH 2/2] ar71xx: Add support for ath79_gpio_function_* on QCA955X X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sven Eckelmann MIME-Version: 1.0 Errors-To: openwrt-devel-bounces@lists.openwrt.org Sender: "openwrt-devel" From: Sven Eckelmann Signed-off-by: Sven Eckelmann --- ...PS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch | 10 +++++++++- ...PS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch | 16 ++++++++++++---- 2 files changed, 21 insertions(+), 5 deletions(-) diff --git a/target/linux/ar71xx/patches-4.1/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch b/target/linux/ar71xx/patches-4.1/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch index 09464e4..431ef83 100644 --- a/target/linux/ar71xx/patches-4.1/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch +++ b/target/linux/ar71xx/patches-4.1/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch @@ -1,6 +1,14 @@ --- a/arch/mips/ath79/gpio.c +++ b/arch/mips/ath79/gpio.c -@@ -223,15 +223,30 @@ void __init ath79_gpio_output_select(uns +@@ -186,6 +186,7 @@ static void __iomem *ath79_gpio_get_func + reg = AR71XX_GPIO_REG_FUNC; + else if (soc_is_ar934x() || + soc_is_qca953x() || ++ soc_is_qca955x() || + soc_is_qca956x() || + soc_is_tp9343()) + reg = AR934X_GPIO_REG_FUNC; +@@ -223,15 +224,30 @@ void __init ath79_gpio_output_select(uns { void __iomem *base = ath79_gpio_base; unsigned long flags; diff --git a/target/linux/ar71xx/patches-4.4/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch b/target/linux/ar71xx/patches-4.4/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch index c715b7f..a65f7d9 100644 --- a/target/linux/ar71xx/patches-4.4/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch +++ b/target/linux/ar71xx/patches-4.4/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch @@ -1,6 +1,14 @@ --- a/arch/mips/ath79/gpio.c +++ b/arch/mips/ath79/gpio.c -@@ -64,15 +64,21 @@ void ath79_gpio_function_disable(u32 mas +@@ -33,6 +33,7 @@ static void __iomem *ath79_gpio_get_func + reg = AR71XX_GPIO_REG_FUNC; + else if (soc_is_ar934x() || + soc_is_qca953x() || ++ soc_is_qca955x() || + soc_is_qca956x() || + soc_is_tp9343()) + reg = AR934X_GPIO_REG_FUNC; +@@ -64,15 +65,21 @@ void ath79_gpio_function_disable(u32 mas void __init ath79_gpio_output_select(unsigned gpio, u8 val) { void __iomem *base = ath79_gpio_base; @@ -9,6 +17,9 @@ u32 t, s; - BUG_ON(!soc_is_ar934x() && !soc_is_qca953x() && !soc_is_qca956x()); +- +- if (gpio >= AR934X_GPIO_COUNT) +- return; + if (soc_is_ar934x()) + reg_base = AR934X_GPIO_REG_OUT_FUNC0; + else if (soc_is_qca953x()) @@ -20,9 +31,6 @@ + else + BUG(); -- if (gpio >= AR934X_GPIO_COUNT) -- return; -- - reg = AR934X_GPIO_REG_OUT_FUNC0 + 4 * (gpio / 4); + reg = reg_base + 4 * (gpio / 4); s = 8 * (gpio % 4);