From patchwork Tue Dec 15 00:41:07 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nikolay Martynov X-Patchwork-Id: 556751 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from arrakis.dune.hu (arrakis.dune.hu [78.24.191.176]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48C941402BD for ; Tue, 15 Dec 2015 11:41:32 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=CxPPmoU+; dkim-atps=neutral Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id 32894280172; Tue, 15 Dec 2015 01:41:07 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on arrakis.dune.hu X-Spam-Level: X-Spam-Status: No, score=-1.5 required=5.0 tests=BAYES_00,FREEMAIL_FROM, T_DKIM_INVALID autolearn=unavailable version=3.3.2 Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id 302DC280172 for ; Tue, 15 Dec 2015 01:41:00 +0100 (CET) X-policyd-weight: using cached result; rate: -8.5 Received: from mail-ig0-f171.google.com (mail-ig0-f171.google.com [209.85.213.171]) by arrakis.dune.hu (Postfix) with ESMTPS for ; Tue, 15 Dec 2015 01:40:59 +0100 (CET) Received: by mail-ig0-f171.google.com with SMTP id to4so18660352igc.0 for ; Mon, 14 Dec 2015 16:41:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=qdwqNUxdL8nwd3yM1NkpsgD47SeR9Lthv12+hz86xM0=; b=CxPPmoU+uhJMz9gxYeAyJRNkB6HIiLsRexuZbTu5vU7GvnQMljZgPXXpNh5SyqBgs2 xRIRuJi7dMC9FThTKgqUDfyWS+78ei9yEIyK8+p4SrKKEoZ9mJvuB2xob4SZRXnmAsib uBEF2Up2hjOprAJvGsMabiYZhYRBrAb/fymkKyKd+muOprai/JlVTNrmxy/IyAbBKE1L PcQC/6FUPY0t9CFdn42kcQqK7RBNn7FuJemXZHt3E970XuMIsfpqlHWDFtjoIlHCRYmU P28azpYj+EsK0gEZ6lAjpkSP7pwtdI/qlq8NU1cRYteea6PJxDl4O5H3EmARoylqUblt DV0Q== X-Received: by 10.50.111.8 with SMTP id ie8mr1162146igb.65.1450140072413; Mon, 14 Dec 2015 16:41:12 -0800 (PST) Received: from kolya-laptop.shuttercorp.net (dhcp-108-170-142-183.cable.user.start.ca. [108.170.142.183]) by smtp.gmail.com with ESMTPSA id cl9sm159193igb.16.2015.12.14.16.41.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 14 Dec 2015 16:41:11 -0800 (PST) From: Nikolay Martynov To: openwrt-devel@lists.openwrt.org Date: Mon, 14 Dec 2015 19:41:07 -0500 Message-Id: <1450140067-29390-1-git-send-email-mar.kolya@gmail.com> X-Mailer: git-send-email 2.6.4 In-Reply-To: <1450062272-7026-1-git-send-email-mar.kolya@gmail.com> References: <1450062272-7026-1-git-send-email-mar.kolya@gmail.com> Subject: [OpenWrt-Devel] [PATCH v2] ramips: mt7621: add patch to setup CM memory region for palmbus X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: openwrt-devel-bounces@lists.openwrt.org Sender: "openwrt-devel" This is tested and works on ubnt-erx. Signed-off-by: Nikolay Martynov --- v2: set palmbus region to same boundaries as stock u-boot --- .../0060-mt7621-set-up-palmbus-memory-region.patch | 36 ++++++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 target/linux/ramips/patches-4.3/0060-mt7621-set-up-palmbus-memory-region.patch diff --git a/target/linux/ramips/patches-4.3/0060-mt7621-set-up-palmbus-memory-region.patch b/target/linux/ramips/patches-4.3/0060-mt7621-set-up-palmbus-memory-region.patch new file mode 100644 index 0000000..ba462bf --- /dev/null +++ b/target/linux/ramips/patches-4.3/0060-mt7621-set-up-palmbus-memory-region.patch @@ -0,0 +1,36 @@ +--- a/arch/mips/include/asm/mach-ralink/mt7621.h ++++ b/arch/mips/include/asm/mach-ralink/mt7621.h +@@ -13,6 +13,9 @@ + #ifndef _MT7621_REGS_H_ + #define _MT7621_REGS_H_ + ++#define MT7621_PALMBUS_BASE 0x1C000000 ++#define MT7621_PALMBUS_SIZE 0x03FFFFFF ++ + #define MT7621_SYSC_BASE 0x1E000000 + + #define SYSC_REG_CHIP_NAME0 0x00 +--- a/arch/mips/ralink/mt7621.c ++++ b/arch/mips/ralink/mt7621.c +@@ -204,6 +204,21 @@ void prom_soc_init(struct ralink_soc_inf + mips_cm_probe(); + mips_cpc_probe(); + ++ if (mips_cm_numiocu()) { ++ /* mips_cm_probe() wipes out bootloader ++ config for CM regions and we have to configure them ++ again. This SoC cannot talk to pamlbus devices ++ witout proper iocu region set up. ++ ++ FIXME: it would be better to do this with values ++ from DT, but we need this very early because ++ without this we cannot talk to pretty much anything ++ including serial. ++ */ ++ write_gcr_reg0_base(MT7621_PALMBUS_BASE); ++ write_gcr_reg0_mask(~MT7621_PALMBUS_SIZE | CM_GCR_REGn_MASK_CMTGT_IOCU0); ++ } ++ + if (!register_cps_smp_ops()) + return; + if (!register_cmp_smp_ops())