new file mode 100644
@@ -0,0 +1,12 @@
+--- a/arch/mips/include/asm/mips-cm.h
++++ b/arch/mips/include/asm/mips-cm.h
+@@ -225,8 +225,7 @@ BUILD_CM_Cx_R_(tcid_8_priority, 0x80)
+ #define CM_GCR_BASE_GCRBASE_MSK (_ULCAST_(0x1ffff) << 15)
+ #define CM_GCR_BASE_CMDEFTGT_SHF 0
+ #define CM_GCR_BASE_CMDEFTGT_MSK (_ULCAST_(0x3) << 0)
+-#define CM_GCR_BASE_CMDEFTGT_DISABLED 0
+-#define CM_GCR_BASE_CMDEFTGT_MEM 1
++#define CM_GCR_BASE_CMDEFTGT_MEM 0
+ #define CM_GCR_BASE_CMDEFTGT_IOCU0 2
+ #define CM_GCR_BASE_CMDEFTGT_IOCU1 3
+
Zero config value for default memory region means 'memory', not not 'disabled' according to 'Control Registers Of The Coherency Manager' manual. Signed-off-by: Nikolay Martynov <mar.kolya@gmail.com> --- ...set-CM_GCR_BASE_CMDEFTGT_MEM-according-to-datasheet.patch | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 target/linux/ramips/patches-4.3/0063-set-CM_GCR_BASE_CMDEFTGT_MEM-according-to-datasheet.patch