From patchwork Tue Sep 1 04:21:26 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: miaoqing pan X-Patchwork-Id: 512686 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from arrakis.dune.hu (arrakis.dune.hu [78.24.191.176]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 70DDD14076C for ; Tue, 1 Sep 2015 14:22:53 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=qti.qualcomm.com header.i=@qti.qualcomm.com header.b=UuNEYLZC; dkim-atps=neutral Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id D1B0028C6B9; Tue, 1 Sep 2015 06:21:14 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on arrakis.dune.hu X-Spam-Level: X-Spam-Status: No, score=-1.5 required=5.0 tests=BAYES_00,T_DKIM_INVALID, T_RP_MATCHES_RCVD autolearn=unavailable version=3.3.2 Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id 1689128C6B8 for ; Tue, 1 Sep 2015 06:21:03 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 CL_IP_EQ_HELO_IP=-2 (check from: .qualcomm. - helo: .wolverine01.qualcomm. - helo-domain: .qualcomm.) FROM/MX_MATCHES_HELO(DOMAIN)=-2; rate: -8.5 Received: from wolverine01.qualcomm.com (wolverine01.qualcomm.com [199.106.114.254]) by arrakis.dune.hu (Postfix) with ESMTPS for ; Tue, 1 Sep 2015 06:20:57 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=qti.qualcomm.com; i=@qti.qualcomm.com; q=dns/txt; s=qcdkim; t=1441081321; x=1472617321; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=7CWCS2hKaa5FjESCUwtjAaPNYFE30idakq+8w+4JBwc=; b=UuNEYLZCXVUKNE/vzdQckLyuEaAIX3MxDlxvMdqtD52rvSHYfi3hKtDJ 4SsNuYbjX5LEo3BlwpQvMPIUAtddfUPx6rx3zhB9tcAQVy/rMoBzzEPSB 7kk8J+QCixzYTLMDXLJ129WFCxzlErUePx3AWTCU7VwayYaDWBu5mVXaI M=; X-IronPort-AV: E=McAfee;i="5700,7163,7910"; a="136095161" Received: from ironmsg04-r.qualcomm.com ([172.30.46.18]) by wolverine01.qualcomm.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 31 Aug 2015 21:21:54 -0700 From: X-IronPort-AV: E=Sophos; i="5.17,446,1437462000"; d="scan'208"; a="1048441503" Received: from nasanexm01b.na.qualcomm.com ([10.85.0.82]) by Ironmsg04-R.qualcomm.com with ESMTP/TLS/RC4-SHA; 31 Aug 2015 21:21:54 -0700 Received: from apsanexr02f.ap.qualcomm.com (10.85.0.29) by NASANEXM01B.na.qualcomm.com (10.85.0.82) with Microsoft SMTP Server (TLS) id 15.0.1076.9; Mon, 31 Aug 2015 21:21:53 -0700 Received: from qcmail1.qualcomm.com (10.80.80.8) by apsanexr02f.ap.qualcomm.com (10.85.0.29) with Microsoft SMTP Server (TLS) id 15.0.1076.9; Mon, 31 Aug 2015 21:21:50 -0700 Received: by qcmail1.qualcomm.com (sSMTP sendmail emulation); Tue, 01 Sep 2015 12:21:45 +0800 To: Date: Tue, 1 Sep 2015 12:21:26 +0800 Message-ID: <1441081287-3100-3-git-send-email-miaoqing@qca.qualcomm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1441081287-3100-1-git-send-email-miaoqing@qca.qualcomm.com> References: <1441081287-3100-1-git-send-email-miaoqing@qca.qualcomm.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: NASANEXM01G.na.qualcomm.com (10.85.0.33) To apsanexr02f.ap.qualcomm.com (10.85.0.29) Subject: [OpenWrt-Devel] [PATCH 3/4] ar71xx: add support for ap152 reference board X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: openwrt-devel-bounces@lists.openwrt.org Sender: "openwrt-devel" From: Miaoqing Pan Signed-off-by: Miaoqing Pan --- target/linux/ar71xx/base-files/lib/ar71xx.sh | 3 + target/linux/ar71xx/config-4.1 | 1 + .../ar71xx/files/arch/mips/ath79/mach-ap152.c | 141 +++++++++++++++++++++ target/linux/ar71xx/generic/profiles/atheros.mk | 11 ++ target/linux/ar71xx/image/Makefile | 3 + .../815-MIPS-ath79-add-ap152-support.patch | 43 +++++++ 6 files changed, 202 insertions(+) create mode 100644 target/linux/ar71xx/files/arch/mips/ath79/mach-ap152.c create mode 100644 target/linux/ar71xx/patches-4.1/815-MIPS-ath79-add-ap152-support.patch diff --git a/target/linux/ar71xx/base-files/lib/ar71xx.sh b/target/linux/ar71xx/base-files/lib/ar71xx.sh index e1f345e..8719b9c 100755 --- a/target/linux/ar71xx/base-files/lib/ar71xx.sh +++ b/target/linux/ar71xx/base-files/lib/ar71xx.sh @@ -371,6 +371,9 @@ ar71xx_board_detect() { *"AP147-010 reference board") name="ap147-010" ;; + *"AP152 reference board") + name="ap152" + ;; *AP81) name="ap81" ;; diff --git a/target/linux/ar71xx/config-4.1 b/target/linux/ar71xx/config-4.1 index 21c4601..32a4422 100644 --- a/target/linux/ar71xx/config-4.1 +++ b/target/linux/ar71xx/config-4.1 @@ -41,6 +41,7 @@ CONFIG_ATH79_MACH_AP132=y CONFIG_ATH79_MACH_AP136=y CONFIG_ATH79_MACH_AP143=y CONFIG_ATH79_MACH_AP147=y +CONFIG_ATH79_MACH_AP152=y CONFIG_ATH79_MACH_AP81=y CONFIG_ATH79_MACH_AP83=y CONFIG_ATH79_MACH_AP96=y diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-ap152.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-ap152.c new file mode 100644 index 0000000..a1eb06b --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-ap152.c @@ -0,0 +1,141 @@ + +/* + * Qualcomm Atheros AP152 reference board support + * + * Copyright (c) 2015 Qualcomm Atheros + * Copyright (c) 2012 Gabor Juhos + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include +#include +#include +#include + +#include "common.h" +#include "dev-m25p80.h" +#include "machtypes.h" +#include "pci.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-spi.h" +#include "dev-usb.h" +#include "dev-wmac.h" + +#define AP152_GPIO_LED_USB0 7 +#define AP152_GPIO_LED_USB1 8 + +#define AP152_GPIO_BTN_RESET 2 +#define AP152_GPIO_BTN_WPS 1 +#define AP152_KEYS_POLL_INTERVAL 20 /* msecs */ +#define AP152_KEYS_DEBOUNCE_INTERVAL (3 * AP152_KEYS_POLL_INTERVAL) + +#define AP152_MAC0_OFFSET 0 +#define AP152_WMAC_CALDATA_OFFSET 0x1000 + +static struct gpio_led ap152_leds_gpio[] __initdata = { + { + .name = "ap152:green:usb0", + .gpio = AP152_GPIO_LED_USB0, + .active_low = 1, + }, + { + .name = "ap152:green:usb1", + .gpio = AP152_GPIO_LED_USB1, + .active_low = 1, + }, +}; + +static struct gpio_keys_button ap152_gpio_keys[] __initdata = { + { + .desc = "WPS button", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = AP152_KEYS_DEBOUNCE_INTERVAL, + .gpio = AP152_GPIO_BTN_WPS, + .active_low = 1, + }, + { + .desc = "Reset button", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = AP152_KEYS_DEBOUNCE_INTERVAL, + .gpio = AP152_GPIO_BTN_RESET, + .active_low = 1, + }, +}; + +static struct ar8327_pad_cfg ap152_ar8337_pad0_cfg = { + .mode = AR8327_PAD_MAC_SGMII, + .sgmii_delay_en = true, +}; + +static struct ar8327_platform_data ap152_ar8337_data = { + .pad0_cfg = &ap152_ar8337_pad0_cfg, + .port0_cfg = { + .force_link = 1, + .speed = AR8327_PORT_SPEED_1000, + .duplex = 1, + .txpause = 1, + .rxpause = 1, + }, +}; + +static struct mdio_board_info ap152_mdio0_info[] = { + { + .bus_id = "ag71xx-mdio.0", + .phy_addr = 0, + .platform_data = &ap152_ar8337_data, + }, +}; + +static void __init ap152_setup(void) +{ + u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); + + ath79_register_m25p80(NULL); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(ap152_leds_gpio), + ap152_leds_gpio); + ath79_register_gpio_keys_polled(-1, AP152_KEYS_POLL_INTERVAL, + ARRAY_SIZE(ap152_gpio_keys), + ap152_gpio_keys); + + ath79_register_usb(); + + platform_device_register(&ath79_mdio0_device); + + mdiobus_register_board_info(ap152_mdio0_info, + ARRAY_SIZE(ap152_mdio0_info)); + + ath79_register_wmac(art + AP152_WMAC_CALDATA_OFFSET, NULL); + ath79_register_pci(); + + ath79_init_mac(ath79_eth0_data.mac_addr, art + AP152_MAC0_OFFSET, 0); + + /* GMAC0 is connected to an AR8337 switch */ + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; + ath79_eth0_data.speed = SPEED_1000; + ath79_eth0_data.duplex = DUPLEX_FULL; + ath79_eth0_data.phy_mask = BIT(0); + ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; + ath79_eth0_pll_data.pll_1000 = 0x06000000; + + ath79_register_eth(0); +} + +MIPS_MACHINE(ATH79_MACH_AP152, "AP152", "Qualcomm Atheros AP152 reference board", + ap152_setup); diff --git a/target/linux/ar71xx/generic/profiles/atheros.mk b/target/linux/ar71xx/generic/profiles/atheros.mk index 5f6657c..3a312a4 100644 --- a/target/linux/ar71xx/generic/profiles/atheros.mk +++ b/target/linux/ar71xx/generic/profiles/atheros.mk @@ -93,6 +93,17 @@ endef $(eval $(call Profile,AP147)) +define Profile/AP152 + NAME:=Qualcomm Atheros AP152 reference board + PACKAGES:=kmod-usb-core kmod-usb2 kmod-usb-storage +endef + +define Profile/AP152/Description + Package set optimized for the Qualcomm Atheros AP152 reference board. +endef + +$(eval $(call Profile,AP152)) + define Profile/AP81 NAME:=Atheros AP81 reference board PACKAGES:=kmod-usb-core kmod-usb2 diff --git a/target/linux/ar71xx/image/Makefile b/target/linux/ar71xx/image/Makefile index 8f609de..f494d0e 100644 --- a/target/linux/ar71xx/image/Makefile +++ b/target/linux/ar71xx/image/Makefile @@ -1189,6 +1189,7 @@ ap136_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,6336k(rootfs),1 ap143_mtdlayout_8M=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,6336k(rootfs),1472k(kernel),64k(art)ro,7744k@0x50000(firmware) ap143_mtdlayout_16M=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,14528k(rootfs),1472k(kernel),64k(art)ro,16000k@0x50000(firmware) ap147_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,14528k(rootfs),1472k(kernel),64k(art),16000k@0x50000(firmware) +ap152_mtdlayout_16M=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,14528k(rootfs),1472k(kernel),64k(art)ro,16000k@0x50000(firmware) bxu2000n2_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),8448k(rootfs),6016k(user),64k(cfg),64k(oem),64k(art)ro cameo_ap81_mtdlayout=mtdparts=spi0.0:128k(u-boot)ro,64k(config)ro,3840k(firmware),64k(art)ro cameo_ap91_mtdlayout=mtdparts=spi0.0:192k(u-boot)ro,64k(nvram)ro,3712k(firmware),64k(mac)ro,64k(art)ro @@ -2074,6 +2075,7 @@ $(eval $(call SingleProfile,AthLzma,64k,AP136_020,ap136-020,AP136-020,ttyS0,1152 $(eval $(call SingleProfile,AthLzma,64k,AP143_8M,ap143-8M,AP143,ttyS0,115200,$$(ap143_mtdlayout_8M),RKuImage)) $(eval $(call SingleProfile,AthLzma,64k,AP143_16M,ap143-16M,AP143,ttyS0,115200,$$(ap143_mtdlayout_16M),RKuImage)) $(eval $(call SingleProfile,AthLzma,64k,AP147_010,ap147-010,AP147-010,ttyS0,115200,$$(ap147_mtdlayout),RKuImage)) +$(eval $(call SingleProfile,AthLzma,64k,AP152_16M,ap152-16M,AP152,ttyS0,115200,$$(ap152_mtdlayout_16M),RKuImage)) $(eval $(call SingleProfile,AthLzma,64k,BXU2000N2,bxu2000n-2-a1,BXU2000n-2-A1,ttyS0,115200,$$(bxu2000n2_mtdlayout),RKuImage)) $(eval $(call SingleProfile,AthLzma,64k,CAP4200AG,cap4200ag,CAP4200AG,ttyS0,115200,$$(cap4200ag_mtdlayout),KRuImage)) $(eval $(call SingleProfile,AthLzma,64k,DB120,db120,DB120,ttyS0,115200,$$(db120_mtdlayout),RKuImage)) @@ -2231,6 +2233,7 @@ $(eval $(call MultiProfile,AP121,AP121_2M AP121_4M)) $(eval $(call MultiProfile,AP136,AP136_010 AP136_020)) $(eval $(call MultiProfile,AP143,AP143_8M AP143_16M)) $(eval $(call MultiProfile,AP147,AP147_010)) +$(eval $(call MultiProfile,AP152,AP152_16M)) $(eval $(call MultiProfile,DIR615IX,DIR615I1 DIR615I3)) $(eval $(call MultiProfile,EWDORIN, EWDORINAP EWDORINRT EWDORIN16M)) $(eval $(call MultiProfile,OPENMESH,OM2P OM5P MR600 MR900)) diff --git a/target/linux/ar71xx/patches-4.1/815-MIPS-ath79-add-ap152-support.patch b/target/linux/ar71xx/patches-4.1/815-MIPS-ath79-add-ap152-support.patch new file mode 100644 index 0000000..0b24886a --- /dev/null +++ b/target/linux/ar71xx/patches-4.1/815-MIPS-ath79-add-ap152-support.patch @@ -0,0 +1,43 @@ +--- a/arch/mips/ath79/Kconfig ++++ b/arch/mips/ath79/Kconfig +@@ -151,6 +151,20 @@ config ATH79_MACH_AP147 + Say 'Y' here if you want your kernel to support the + QCA AP147 reference boards. + ++config ATH79_MACH_AP152 ++ bool "Atheros AP152 reference board" ++ select SOC_QCA956X ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ select ATH79_DEV_AP9X_PCI if PCI ++ help ++ Say 'Y' here if you want your kernel to support the ++ QCA AP152 reference boards. ++ ++ + config ATH79_MACH_AP81 + bool "Atheros AP81 reference board" + select SOC_AR913X +--- a/arch/mips/ath79/Makefile ++++ b/arch/mips/ath79/Makefile +@@ -50,6 +50,7 @@ obj-$(CONFIG_ATH79_MACH_AP132) += mach-ap132.o + obj-$(CONFIG_ATH79_MACH_AP136) += mach-ap136.o + obj-$(CONFIG_ATH79_MACH_AP143) += mach-ap143.o + obj-$(CONFIG_ATH79_MACH_AP147) += mach-ap147.o ++obj-$(CONFIG_ATH79_MACH_AP152) += mach-ap152.o + obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o + obj-$(CONFIG_ATH79_MACH_AP83) += mach-ap83.o + obj-$(CONFIG_ATH79_MACH_AP96) += mach-ap96.o +--- a/arch/mips/ath79/machtypes.h ++++ b/arch/mips/ath79/machtypes.h +@@ -32,6 +32,7 @@ enum ath79_mach_type { + ATH79_MACH_AP136_020, /* Atheros AP136-020 reference board */ + ATH79_MACH_AP143, /* Atheros AP143 reference board */ + ATH79_MACH_AP147_010, /* Atheros AP147-010 reference board */ ++ ATH79_MACH_AP152, /* Atheros AP152 reference board */ + ATH79_MACH_AP81, /* Atheros AP81 reference board */ + ATH79_MACH_AP83, /* Atheros AP83 */ + ATH79_MACH_AP96, /* Atheros AP96 */