From patchwork Sun Aug 23 13:52:24 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Gorski X-Patchwork-Id: 509857 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from arrakis.dune.hu (arrakis.dune.hu [78.24.191.176]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id A97A71402A0 for ; Sun, 23 Aug 2015 23:56:16 +1000 (AEST) Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id 02C9328C16F; Sun, 23 Aug 2015 15:53:30 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on arrakis.dune.hu X-Spam-Level: X-Spam-Status: No, score=-2.5 required=5.0 tests=ALL_TRUSTED,BAYES_00 autolearn=unavailable version=3.3.2 Received: from localhost (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id A0B8C28BFDA; Sun, 23 Aug 2015 15:52:24 +0200 (CEST) X-Virus-Scanned: at arrakis.dune.hu Received: from localhost.localdomain (dslb-088-073-024-154.088.073.pools.vodafone-ip.de [88.73.24.154]) by arrakis.dune.hu (Postfix) with ESMTPSA id 1A2CC28C161; Sun, 23 Aug 2015 15:51:40 +0200 (CEST) From: Jonas Gorski To: openwrt-devel@lists.openwrt.org Date: Sun, 23 Aug 2015 15:52:24 +0200 Message-Id: <1440337944-3803-3-git-send-email-jogo@openwrt.org> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1440337944-3803-1-git-send-email-jogo@openwrt.org> References: <1440337944-3803-1-git-send-email-jogo@openwrt.org> Subject: [OpenWrt-Devel] [PATCH 3/3] mvebu: Add Armada 388 General Purpose Development Board support X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: openwrt-devel-bounces@lists.openwrt.org Sender: "openwrt-devel" The A388-GP is a board produced by Marvell that holds - 1 PCIe slot - 2 mini PCIe slot (one of them is multiplexed with the PCIe slot, muxing is selected through the GPIO expander) - 1 16MB SPI-NOR - 2 Gigabit Ethernet ports - 4 SATA ports (2 of them are multiplexed with the mini PCIe slots, muxing is selected through the GPIO expander) - 1 SDIO slot - 1 USB3 port - 2 USB2 port - 2 GPIO/interrupts expander on I2C Cherry pick the approriate patches from 4.0 that add the dts file and its dependencies, add partitions to the spi flash and add a profile. As a side effect the 385-rd dts file gets renamed to 388-rd for 3.18 as well; matching what it was named in 4.0 already. Signed-off-by: Jonas Gorski --- .../mvebu/base-files/etc/uci-defaults/02_network | 3 + target/linux/mvebu/base-files/lib/mvebu.sh | 3 + target/linux/mvebu/image/Makefile | 3 +- ...emove-clock-frequency-from-Armada-38x-SDH.patch | 32 ++ ...nable-no-1-8-v-flag-for-Armada-385-DB-SDH.patch | 35 ++ ...ARM-mvebu-a38x-Add-more-pinctrl-functions.patch | 84 +++ ...dd-Device-Tree-description-of-the-Armada-.patch | 632 +++++++++++++++++++++ ...dd-Armada-388-General-Purpose-Development.patch | 329 +++++++++++ .../patches-3.18/099-build_linksys_a385_dts.patch | 10 +- .../207-armada-385-rd-mtd-partitions.patch | 6 +- .../209-armada-385-gp-mtd-partitions.patch | 19 + .../patches-3.18/300-add_missing_labels.patch | 2 +- .../mvebu/patches-3.18/600-armada_38x_rtc.patch | 2 +- .../209-armada-385-gp-mtd-partitions.patch | 19 + target/linux/mvebu/profiles/marvell.mk | 24 +- 15 files changed, 1188 insertions(+), 15 deletions(-) create mode 100644 target/linux/mvebu/patches-3.18/071-ARM-mvebu-remove-clock-frequency-from-Armada-38x-SDH.patch create mode 100644 target/linux/mvebu/patches-3.18/072-ARM-mvebu-enable-no-1-8-v-flag-for-Armada-385-DB-SDH.patch create mode 100644 target/linux/mvebu/patches-3.18/073-ARM-mvebu-a38x-Add-more-pinctrl-functions.patch create mode 100644 target/linux/mvebu/patches-3.18/074-ARM-mvebu-Add-Device-Tree-description-of-the-Armada-.patch create mode 100644 target/linux/mvebu/patches-3.18/075-ARM-mvebu-Add-Armada-388-General-Purpose-Development.patch create mode 100644 target/linux/mvebu/patches-3.18/209-armada-385-gp-mtd-partitions.patch create mode 100644 target/linux/mvebu/patches-4.0/209-armada-385-gp-mtd-partitions.patch diff --git a/target/linux/mvebu/base-files/etc/uci-defaults/02_network b/target/linux/mvebu/base-files/etc/uci-defaults/02_network index d1ead03..002457b 100644 --- a/target/linux/mvebu/base-files/etc/uci-defaults/02_network +++ b/target/linux/mvebu/base-files/etc/uci-defaults/02_network @@ -30,6 +30,9 @@ armada-xp-linksys-mamba) armada-385-db-ap) ucidef_set_interfaces_lan_wan "eth0 eth1" "eth2" ;; +armada-388-gp) + ucidef_set_interface_lan "eth0 eth1" + ;; armada-xp-gp) ucidef_set_interface_lan "eth0 eth1 eth2 eth3" ;; diff --git a/target/linux/mvebu/base-files/lib/mvebu.sh b/target/linux/mvebu/base-files/lib/mvebu.sh index 3edfa6b..0a99209 100755 --- a/target/linux/mvebu/base-files/lib/mvebu.sh +++ b/target/linux/mvebu/base-files/lib/mvebu.sh @@ -43,6 +43,9 @@ mvebu_board_detect() { *"Marvell Armada 385 Access Point Development Board") name="armada-385-db-ap" ;; + *"Marvell Armada 385 GP") + name="armada-388-gp" + ;; *"Marvell Armada XP Development Board DB-MV784MP-GP") name="armada-xp-gp" ;; diff --git a/target/linux/mvebu/image/Makefile b/target/linux/mvebu/image/Makefile index 255f1a4..b9a66a3 100644 --- a/target/linux/mvebu/image/Makefile +++ b/target/linux/mvebu/image/Makefile @@ -140,7 +140,8 @@ $(eval $(call NANDProfile,Cobra,armada-385-linksys-cobra,128KiB,2048,512,2048)) $(eval $(call UBINORProfile,OpenBlocks-AX-3-4,armada-xp-openblocks-ax3-4,128KiB)) # Boards with small NOR, where UBI doesn't make sense -$(eval $(call NORProfile,385-RD,armada-385-rd,256KiB)) +$(eval $(call NORProfile,388-GP,armada-388-gp,256KiB)) +$(eval $(call NORProfile,388-RD,armada-388-rd,256KiB)) ### ### Linksys diff --git a/target/linux/mvebu/patches-3.18/071-ARM-mvebu-remove-clock-frequency-from-Armada-38x-SDH.patch b/target/linux/mvebu/patches-3.18/071-ARM-mvebu-remove-clock-frequency-from-Armada-38x-SDH.patch new file mode 100644 index 0000000..7adb2ad --- /dev/null +++ b/target/linux/mvebu/patches-3.18/071-ARM-mvebu-remove-clock-frequency-from-Armada-38x-SDH.patch @@ -0,0 +1,32 @@ +From ebf50c9651ff28341b76e78c531592d7d3489bc6 Mon Sep 17 00:00:00 2001 +From: Marcin Wojtas +Date: Fri, 14 Nov 2014 16:57:30 +0100 +Subject: [PATCH] ARM: mvebu: remove clock-frequency from Armada 38x SDHCI + Device Tree node + +For proper operation of Armada 38x SDHCI controller proper 'clocks' property +is sufficient. Therefore it is not useful to keep an additional +'clock-frequency' property in SDHCI controller node of board-level Device Tree +file for Armada 385 DB. + +This commit gets rid of useless 'clock-frequency' property. + +Signed-off-by: Marcin Wojtas +Reviewed-by: Gregory CLEMENT +Acked-by: Andrew Lunn +Link: https://lkml.kernel.org/r/1415980652-7429-4-git-send-email-mw@semihalf.com +Signed-off-by: Jason Cooper +--- + arch/arm/boot/dts/armada-385-db.dts | 1 - + 1 file changed, 1 deletion(-) + +--- a/arch/arm/boot/dts/armada-385-db.dts ++++ b/arch/arm/boot/dts/armada-385-db.dts +@@ -116,7 +116,6 @@ + }; + + sdhci@d8000 { +- clock-frequency = <200000000>; + broken-cd; + wp-inverted; + bus-width = <8>; diff --git a/target/linux/mvebu/patches-3.18/072-ARM-mvebu-enable-no-1-8-v-flag-for-Armada-385-DB-SDH.patch b/target/linux/mvebu/patches-3.18/072-ARM-mvebu-enable-no-1-8-v-flag-for-Armada-385-DB-SDH.patch new file mode 100644 index 0000000..313dd43 --- /dev/null +++ b/target/linux/mvebu/patches-3.18/072-ARM-mvebu-enable-no-1-8-v-flag-for-Armada-385-DB-SDH.patch @@ -0,0 +1,35 @@ +From 5e949f0c79917f3fd8512a3b66b0c861e03ec5a6 Mon Sep 17 00:00:00 2001 +From: Marcin Wojtas +Date: Fri, 14 Nov 2014 16:57:29 +0100 +Subject: [PATCH] ARM: mvebu: enable no-1-8-v flag for Armada 385 DB SDHCI + interface + +The Marvell Armada 38x SoC's SDHCI interface is capable of using 1.8v voltage, +needed for driving "UHS-I" SD cards at their full speed. It is not, however, +possible on the DB board. Due to physical connectivity connector supply is tied +to 3v and any attempt of changing voltage in order to operate in the fastest UHS +modes fails. + +This patch enables equivalent SDHCI quirk in order to adjust controller +operation to system capabilities. + +Signed-off-by: Marcin Wojtas +Reviewed-by: Gregory CLEMENT +Acked-by: Thomas Petazzoni +Acked-by: Andrew Lunn +Link: https://lkml.kernel.org/r/1415980652-7429-3-git-send-email-mw@semihalf.com +Signed-off-by: Jason Cooper +--- + arch/arm/boot/dts/armada-385-db.dts | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/arm/boot/dts/armada-385-db.dts ++++ b/arch/arm/boot/dts/armada-385-db.dts +@@ -120,6 +120,7 @@ + wp-inverted; + bus-width = <8>; + status = "okay"; ++ no-1-8-v; + }; + + usb3@f0000 { diff --git a/target/linux/mvebu/patches-3.18/073-ARM-mvebu-a38x-Add-more-pinctrl-functions.patch b/target/linux/mvebu/patches-3.18/073-ARM-mvebu-a38x-Add-more-pinctrl-functions.patch new file mode 100644 index 0000000..9812e81 --- /dev/null +++ b/target/linux/mvebu/patches-3.18/073-ARM-mvebu-a38x-Add-more-pinctrl-functions.patch @@ -0,0 +1,84 @@ +From 34598503049688741edc45e800627d945293e5f2 Mon Sep 17 00:00:00 2001 +From: Gregory CLEMENT +Date: Thu, 8 Jan 2015 18:38:10 +0100 +Subject: [PATCH] ARM: mvebu: a38x: Add more pinctrl functions + +With the Armada 385 GP board more pinctrl functions depending of the +SoC are needed. Add them to the DTSI to avoid duplication. + +Signed-off-by: Gregory CLEMENT +Signed-off-by: Andrew Lunn +--- + arch/arm/boot/dts/armada-38x.dtsi | 47 +++++++++++++++++++++++++++++++++++++ + 1 file changed, 47 insertions(+) + +--- a/arch/arm/boot/dts/armada-38x.dtsi ++++ b/arch/arm/boot/dts/armada-38x.dtsi +@@ -205,6 +205,14 @@ + marvell,function = "ge0"; + }; + ++ ge1_rgmii_pins: ge-rgmii-pins-1 { ++ marvell,pins = "mpp21", "mpp27", "mpp28", ++ "mpp29", "mpp30", "mpp31", ++ "mpp32", "mpp37", "mpp38", ++ "mpp39", "mpp40", "mpp41"; ++ marvell,function = "ge1"; ++ }; ++ + i2c0_pins: i2c-pins-0 { + marvell,pins = "mpp2", "mpp3"; + marvell,function = "i2c0"; +@@ -220,6 +228,17 @@ + marvell,function = "ref"; + }; + ++ ref_clk1_pins: ref-clk-pins-1 { ++ marvell,pins = "mpp46"; ++ marvell,function = "ref"; ++ }; ++ ++ spi0_pins: spi-pins-0 { ++ marvell,pins = "mpp22", "mpp23", "mpp24", ++ "mpp25"; ++ marvell,function = "spi0"; ++ }; ++ + spi1_pins: spi-pins-1 { + marvell,pins = "mpp56", "mpp57", "mpp58", + "mpp59"; +@@ -235,6 +254,34 @@ + marvell,pins = "mpp19", "mpp20"; + marvell,function = "ua1"; + }; ++ ++ sdhci_pins: sdhci-pins { ++ marvell,pins = "mpp48", "mpp49", "mpp50", ++ "mpp52", "mpp53", "mpp54", ++ "mpp55", "mpp57", "mpp58", ++ "mpp59"; ++ marvell,function = "sd0"; ++ }; ++ ++ sata0_pins: sata-pins-0 { ++ marvell,pins = "mpp20"; ++ marvell,function = "sata0"; ++ }; ++ ++ sata1_pins: sata-pins-1 { ++ marvell,pins = "mpp19"; ++ marvell,function = "sata1"; ++ }; ++ ++ sata2_pins: sata-pins-2 { ++ marvell,pins = "mpp47"; ++ marvell,function = "sata2"; ++ }; ++ ++ sata3_pins: sata-pins-3 { ++ marvell,pins = "mpp44"; ++ marvell,function = "sata3"; ++ }; + }; + + gpio0: gpio@18100 { diff --git a/target/linux/mvebu/patches-3.18/074-ARM-mvebu-Add-Device-Tree-description-of-the-Armada-.patch b/target/linux/mvebu/patches-3.18/074-ARM-mvebu-Add-Device-Tree-description-of-the-Armada-.patch new file mode 100644 index 0000000..828e1e5 --- /dev/null +++ b/target/linux/mvebu/patches-3.18/074-ARM-mvebu-Add-Device-Tree-description-of-the-Armada-.patch @@ -0,0 +1,632 @@ +From 881a50e47f231fb0185396125234f3188e14c2f3 Mon Sep 17 00:00:00 2001 +From: Gregory CLEMENT +Date: Thu, 8 Jan 2015 18:38:13 +0100 +Subject: [PATCH] ARM: mvebu: Add Device Tree description of the Armada 388 + SoC + +This SoC belongs to the Armada 38x family. The main difference with +the Armada 385 is that the 388 can handle two more SATA +ports. Currently the consequence is the use of a different compatible +string for the pinctrl node, in order to be able to use the pins +associated to this 2 new SATA ports. The second SATA controller has +also been moved from the armada38x.dtsi as it it specific to the +Armada388 version. + +In the same time the Armada385 DB and Armada 385 RD board have been +renamed in the 388 one and now include the armada-388.dtsi file. AS +both of them have 4 SATA ports the SoC used on them were wrongly +described. + +Signed-off-by: Gregory CLEMENT +Signed-off-by: Andrew Lunn +--- + arch/arm/boot/dts/Makefile | 4 +- + arch/arm/boot/dts/armada-385-db.dts | 151 ---------------------------------- + arch/arm/boot/dts/armada-385-rd.dts | 97 ---------------------- + arch/arm/boot/dts/armada-388-db.dts | 152 +++++++++++++++++++++++++++++++++++ + arch/arm/boot/dts/armada-388-rd.dts | 98 ++++++++++++++++++++++ + arch/arm/boot/dts/armada-388.dtsi | 70 ++++++++++++++++ + 6 files changed, 322 insertions(+), 250 deletions(-) + delete mode 100644 arch/arm/boot/dts/armada-385-db.dts + delete mode 100644 arch/arm/boot/dts/armada-385-rd.dts + create mode 100644 arch/arm/boot/dts/armada-388-db.dts + create mode 100644 arch/arm/boot/dts/armada-388-rd.dts + create mode 100644 arch/arm/boot/dts/armada-388.dtsi + +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -499,9 +499,9 @@ dtb-$(CONFIG_MACH_ARMADA_370) += \ + dtb-$(CONFIG_MACH_ARMADA_375) += \ + armada-375-db.dtb + dtb-$(CONFIG_MACH_ARMADA_38X) += \ +- armada-385-db.dtb \ + armada-385-db-ap.dtb \ +- armada-385-rd.dtb ++ armada-388-db.dtb \ ++ armada-388-rd.dtb + dtb-$(CONFIG_MACH_ARMADA_XP) += \ + armada-xp-axpwifiap.dtb \ + armada-xp-db.dtb \ +--- a/arch/arm/boot/dts/armada-385-db.dts ++++ /dev/null +@@ -1,151 +0,0 @@ +-/* +- * Device Tree file for Marvell Armada 385 evaluation board +- * (DB-88F6820) +- * +- * Copyright (C) 2014 Marvell +- * +- * Thomas Petazzoni +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- */ +- +-/dts-v1/; +-#include "armada-385.dtsi" +- +-/ { +- model = "Marvell Armada 385 Development Board"; +- compatible = "marvell,a385-db", "marvell,armada385", "marvell,armada380"; +- +- chosen { +- bootargs = "console=ttyS0,115200 earlyprintk"; +- }; +- +- memory { +- device_type = "memory"; +- reg = <0x00000000 0x10000000>; /* 256 MB */ +- }; +- +- soc { +- ranges = ; +- +- internal-regs { +- spi@10600 { +- status = "okay"; +- +- spi-flash@0 { +- #address-cells = <1>; +- #size-cells = <1>; +- compatible = "w25q32"; +- reg = <0>; /* Chip select 0 */ +- spi-max-frequency = <108000000>; +- }; +- }; +- +- i2c@11000 { +- status = "okay"; +- clock-frequency = <100000>; +- }; +- +- i2c@11100 { +- status = "okay"; +- clock-frequency = <100000>; +- }; +- +- serial@12000 { +- status = "okay"; +- }; +- +- ethernet@30000 { +- status = "okay"; +- phy = <&phy1>; +- phy-mode = "rgmii-id"; +- }; +- +- usb@50000 { +- status = "ok"; +- }; +- +- ethernet@70000 { +- status = "okay"; +- phy = <&phy0>; +- phy-mode = "rgmii-id"; +- }; +- +- mdio@72004 { +- phy0: ethernet-phy@0 { +- reg = <0>; +- }; +- +- phy1: ethernet-phy@1 { +- reg = <1>; +- }; +- }; +- +- sata@a8000 { +- status = "okay"; +- }; +- +- sata@e0000 { +- status = "okay"; +- }; +- +- flash@d0000 { +- status = "okay"; +- num-cs = <1>; +- marvell,nand-keep-config; +- marvell,nand-enable-arbiter; +- nand-on-flash-bbt; +- nand-ecc-strength = <4>; +- nand-ecc-step-size = <512>; +- +- partition@0 { +- label = "U-Boot"; +- reg = <0 0x800000>; +- }; +- partition@800000 { +- label = "Linux"; +- reg = <0x800000 0x800000>; +- }; +- partition@1000000 { +- label = "Filesystem"; +- reg = <0x1000000 0x3f000000>; +- }; +- }; +- +- sdhci@d8000 { +- broken-cd; +- wp-inverted; +- bus-width = <8>; +- status = "okay"; +- no-1-8-v; +- }; +- +- usb3@f0000 { +- status = "okay"; +- }; +- +- usb3@f8000 { +- status = "okay"; +- }; +- }; +- +- pcie-controller { +- status = "okay"; +- /* +- * The two PCIe units are accessible through +- * standard PCIe slots on the board. +- */ +- pcie@1,0 { +- /* Port 0, Lane 0 */ +- status = "okay"; +- }; +- pcie@2,0 { +- /* Port 1, Lane 0 */ +- status = "okay"; +- }; +- }; +- }; +-}; +--- a/arch/arm/boot/dts/armada-385-rd.dts ++++ /dev/null +@@ -1,97 +0,0 @@ +-/* +- * Device Tree file for Marvell Armada 385 Reference Design board +- * (RD-88F6820-AP) +- * +- * Copyright (C) 2014 Marvell +- * +- * Gregory CLEMENT +- * Thomas Petazzoni +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- */ +- +-/dts-v1/; +-#include "armada-385.dtsi" +- +-/ { +- model = "Marvell Armada 385 Reference Design"; +- compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada380"; +- +- chosen { +- bootargs = "console=ttyS0,115200 earlyprintk"; +- }; +- +- memory { +- device_type = "memory"; +- reg = <0x00000000 0x10000000>; /* 256 MB */ +- }; +- +- soc { +- ranges = ; +- +- internal-regs { +- spi@10600 { +- status = "okay"; +- +- spi-flash@0 { +- #address-cells = <1>; +- #size-cells = <1>; +- compatible = "st,m25p128"; +- reg = <0>; /* Chip select 0 */ +- spi-max-frequency = <108000000>; +- }; +- }; +- +- i2c@11000 { +- status = "okay"; +- clock-frequency = <100000>; +- }; +- +- serial@12000 { +- status = "okay"; +- }; +- +- ethernet@30000 { +- status = "okay"; +- phy = <&phy0>; +- phy-mode = "rgmii-id"; +- }; +- +- ethernet@70000 { +- status = "okay"; +- phy = <&phy1>; +- phy-mode = "rgmii-id"; +- }; +- +- +- mdio@72004 { +- phy0: ethernet-phy@0 { +- reg = <0>; +- }; +- +- phy1: ethernet-phy@1 { +- reg = <1>; +- }; +- }; +- +- usb3@f0000 { +- status = "okay"; +- }; +- }; +- +- pcie-controller { +- status = "okay"; +- /* +- * One PCIe units is accessible through +- * standard PCIe slot on the board. +- */ +- pcie@1,0 { +- /* Port 0, Lane 0 */ +- status = "okay"; +- }; +- }; +- }; +-}; +--- /dev/null ++++ b/arch/arm/boot/dts/armada-388-db.dts +@@ -0,0 +1,152 @@ ++/* ++ * Device Tree file for Marvell Armada 388 evaluation board ++ * (DB-88F6820) ++ * ++ * Copyright (C) 2014 Marvell ++ * ++ * Thomas Petazzoni ++ * ++ * This file is licensed under the terms of the GNU General Public ++ * License version 2. This program is licensed "as is" without any ++ * warranty of any kind, whether express or implied. ++ */ ++ ++/dts-v1/; ++#include "armada-388.dtsi" ++ ++/ { ++ model = "Marvell Armada 385 Development Board"; ++ compatible = "marvell,a385-db", "marvell,armada388", ++ "marvell,armada385", "marvell,armada380"; ++ ++ chosen { ++ bootargs = "console=ttyS0,115200 earlyprintk"; ++ }; ++ ++ memory { ++ device_type = "memory"; ++ reg = <0x00000000 0x10000000>; /* 256 MB */ ++ }; ++ ++ soc { ++ ranges = ; ++ ++ internal-regs { ++ spi@10600 { ++ status = "okay"; ++ ++ spi-flash@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "w25q32"; ++ reg = <0>; /* Chip select 0 */ ++ spi-max-frequency = <108000000>; ++ }; ++ }; ++ ++ i2c@11000 { ++ status = "okay"; ++ clock-frequency = <100000>; ++ }; ++ ++ i2c@11100 { ++ status = "okay"; ++ clock-frequency = <100000>; ++ }; ++ ++ serial@12000 { ++ status = "okay"; ++ }; ++ ++ ethernet@30000 { ++ status = "okay"; ++ phy = <&phy1>; ++ phy-mode = "rgmii-id"; ++ }; ++ ++ usb@50000 { ++ status = "ok"; ++ }; ++ ++ ethernet@70000 { ++ status = "okay"; ++ phy = <&phy0>; ++ phy-mode = "rgmii-id"; ++ }; ++ ++ mdio@72004 { ++ phy0: ethernet-phy@0 { ++ reg = <0>; ++ }; ++ ++ phy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++ }; ++ ++ sata@a8000 { ++ status = "okay"; ++ }; ++ ++ sata@e0000 { ++ status = "okay"; ++ }; ++ ++ flash@d0000 { ++ status = "okay"; ++ num-cs = <1>; ++ marvell,nand-keep-config; ++ marvell,nand-enable-arbiter; ++ nand-on-flash-bbt; ++ nand-ecc-strength = <4>; ++ nand-ecc-step-size = <512>; ++ ++ partition@0 { ++ label = "U-Boot"; ++ reg = <0 0x800000>; ++ }; ++ partition@800000 { ++ label = "Linux"; ++ reg = <0x800000 0x800000>; ++ }; ++ partition@1000000 { ++ label = "Filesystem"; ++ reg = <0x1000000 0x3f000000>; ++ }; ++ }; ++ ++ sdhci@d8000 { ++ broken-cd; ++ wp-inverted; ++ bus-width = <8>; ++ status = "okay"; ++ no-1-8-v; ++ }; ++ ++ usb3@f0000 { ++ status = "okay"; ++ }; ++ ++ usb3@f8000 { ++ status = "okay"; ++ }; ++ }; ++ ++ pcie-controller { ++ status = "okay"; ++ /* ++ * The two PCIe units are accessible through ++ * standard PCIe slots on the board. ++ */ ++ pcie@1,0 { ++ /* Port 0, Lane 0 */ ++ status = "okay"; ++ }; ++ pcie@2,0 { ++ /* Port 1, Lane 0 */ ++ status = "okay"; ++ }; ++ }; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/armada-388-rd.dts +@@ -0,0 +1,98 @@ ++/* ++ * Device Tree file for Marvell Armada 388 Reference Design board ++ * (RD-88F6820-AP) ++ * ++ * Copyright (C) 2014 Marvell ++ * ++ * Gregory CLEMENT ++ * Thomas Petazzoni ++ * ++ * This file is licensed under the terms of the GNU General Public ++ * License version 2. This program is licensed "as is" without any ++ * warranty of any kind, whether express or implied. ++ */ ++ ++/dts-v1/; ++#include "armada-388.dtsi" ++ ++/ { ++ model = "Marvell Armada 385 Reference Design"; ++ compatible = "marvell,a385-rd", "marvell,armada388", ++ "marvell,armada385","marvell,armada380"; ++ ++ chosen { ++ bootargs = "console=ttyS0,115200 earlyprintk"; ++ }; ++ ++ memory { ++ device_type = "memory"; ++ reg = <0x00000000 0x10000000>; /* 256 MB */ ++ }; ++ ++ soc { ++ ranges = ; ++ ++ internal-regs { ++ spi@10600 { ++ status = "okay"; ++ ++ spi-flash@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "st,m25p128"; ++ reg = <0>; /* Chip select 0 */ ++ spi-max-frequency = <108000000>; ++ }; ++ }; ++ ++ i2c@11000 { ++ status = "okay"; ++ clock-frequency = <100000>; ++ }; ++ ++ serial@12000 { ++ status = "okay"; ++ }; ++ ++ ethernet@30000 { ++ status = "okay"; ++ phy = <&phy0>; ++ phy-mode = "rgmii-id"; ++ }; ++ ++ ethernet@70000 { ++ status = "okay"; ++ phy = <&phy1>; ++ phy-mode = "rgmii-id"; ++ }; ++ ++ ++ mdio@72004 { ++ phy0: ethernet-phy@0 { ++ reg = <0>; ++ }; ++ ++ phy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++ }; ++ ++ usb3@f0000 { ++ status = "okay"; ++ }; ++ }; ++ ++ pcie-controller { ++ status = "okay"; ++ /* ++ * One PCIe units is accessible through ++ * standard PCIe slot on the board. ++ */ ++ pcie@1,0 { ++ /* Port 0, Lane 0 */ ++ status = "okay"; ++ }; ++ }; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/armada-388.dtsi +@@ -0,0 +1,70 @@ ++/* ++ * Device Tree Include file for Marvell Armada 388 SoC. ++ * ++ * Copyright (C) 2015 Marvell ++ * ++ * Gregory CLEMENT ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is licensed under the terms of the GNU General Public ++ * License version 2. This program is licensed "as is" without ++ * any warranty of any kind, whether express or implied. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ * ++ * ++ * The main difference with the Armada 385 is that the 388 can handle two more ++ * SATA ports. So we can reuse the dtsi of the Armada 385, override the pinctrl ++ * property and the name of the SoC, and add the second SATA host which control ++ * the 2 other ports. ++ */ ++ ++#include "armada-385.dtsi" ++ ++/ { ++ model = "Marvell Armada 388 family SoC"; ++ compatible = "marvell,armada388", "marvell,armada385", ++ "marvell,armada380"; ++ ++ soc { ++ internal-regs { ++ pinctrl@18000 { ++ compatible = "marvell,mv88f6828-pinctrl"; ++ }; ++ ++ sata@e0000 { ++ compatible = "marvell,armada-380-ahci"; ++ reg = <0xe0000 0x2000>; ++ interrupts = ; ++ clocks = <&gateclk 30>; ++ status = "disabled"; ++ }; ++ ++ }; ++ }; ++}; diff --git a/target/linux/mvebu/patches-3.18/075-ARM-mvebu-Add-Armada-388-General-Purpose-Development.patch b/target/linux/mvebu/patches-3.18/075-ARM-mvebu-Add-Armada-388-General-Purpose-Development.patch new file mode 100644 index 0000000..1807e5f --- /dev/null +++ b/target/linux/mvebu/patches-3.18/075-ARM-mvebu-Add-Armada-388-General-Purpose-Development.patch @@ -0,0 +1,329 @@ +From 928413bd859c0936f03f6a3504c4721e83a3d1d7 Mon Sep 17 00:00:00 2001 +From: Gregory CLEMENT +Date: Thu, 8 Jan 2015 19:11:33 +0100 +Subject: [PATCH] ARM: mvebu: Add Armada 388 General Purpose Development Board + support + +The A388-GP is a board produced by Marvell that holds + +- 1 PCIe slot +- 2 mini PCIe slot (one of them is multiplexed with the PCIe slot, + muxing is selected through the GPIO expander) +- 1 16MB SPI-NOR +- 2 Gigabit Ethernet ports +- 4 SATA ports (2 of them are multiplexed with the mini PCIe slots, + muxing is selected through the GPIO expander) +- 1 SDIO slot +- 1 USB3 port +- 2 USB2 port +- 2 GPIO/interrupts expander on I2C + +Signed-off-by: Gregory CLEMENT +Signed-off-by: Andrew Lunn +--- + arch/arm/boot/dts/Makefile | 1 + + arch/arm/boot/dts/armada-388-gp.dts | 288 +++++++++++++++++++++++++++++++++++ + 2 files changed, 289 insertions(+) + create mode 100644 arch/arm/boot/dts/armada-388-gp.dts + +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -501,6 +501,7 @@ dtb-$(CONFIG_MACH_ARMADA_375) += \ + dtb-$(CONFIG_MACH_ARMADA_38X) += \ + armada-385-db-ap.dtb \ + armada-388-db.dtb \ ++ armada-388-gp.dtb \ + armada-388-rd.dtb + dtb-$(CONFIG_MACH_ARMADA_XP) += \ + armada-xp-axpwifiap.dtb \ +--- /dev/null ++++ b/arch/arm/boot/dts/armada-388-gp.dts +@@ -0,0 +1,288 @@ ++/* ++ * Device Tree file for Marvell Armada 385 development board ++ * (RD-88F6820-GP) ++ * ++ * Copyright (C) 2014 Marvell ++ * ++ * Gregory CLEMENT ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is licensed under the terms of the GNU General Public ++ * License version 2. This program is licensed "as is" without ++ * any warranty of any kind, whether express or implied. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++#include "armada-388.dtsi" ++#include ++ ++/ { ++ model = "Marvell Armada 385 GP"; ++ compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380"; ++ ++ chosen { ++ bootargs = "console=ttyS0,115200"; ++ stdout-path = &uart0; ++ }; ++ ++ memory { ++ device_type = "memory"; ++ reg = <0x00000000 0x80000000>; /* 2 GB */ ++ }; ++ ++ soc { ++ ranges = ; ++ ++ internal-regs { ++ spi@10600 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi0_pins>; ++ status = "okay"; ++ ++ spi-flash@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "st,m25p128"; ++ reg = <0>; /* Chip select 0 */ ++ spi-max-frequency = <50000000>; ++ m25p,fast-read; ++ }; ++ }; ++ ++ i2c@11000 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0_pins>; ++ status = "okay"; ++ clock-frequency = <100000>; ++ /* ++ * The EEPROM located at adresse 54 is needed ++ * for the boot - DO NOT ERASE IT - ++ */ ++ ++ expander0: pca9555@20 { ++ compatible = "nxp,pca9555"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pca0_pins>; ++ interrupt-parent = <&gpio0>; ++ interrupts = <18 IRQ_TYPE_EDGE_FALLING>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ reg = <0x20>; ++ }; ++ ++ expander1: pca9555@21 { ++ compatible = "nxp,pca9555"; ++ pinctrl-names = "default"; ++ interrupt-parent = <&gpio0>; ++ interrupts = <18 IRQ_TYPE_EDGE_FALLING>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ reg = <0x21>; ++ }; ++ ++ }; ++ ++ serial@12000 { ++ /* ++ * Exported on the micro USB connector CON16 ++ * through an FTDI ++ */ ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins>; ++ status = "okay"; ++ }; ++ ++ /* GE1 CON15 */ ++ ethernet@30000 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&ge1_rgmii_pins>; ++ status = "okay"; ++ phy = <&phy1>; ++ phy-mode = "rgmii-id"; ++ }; ++ ++ /* CON4 */ ++ usb@50000 { ++ vcc-supply = <®_usb2_0_vbus>; ++ status = "okay"; ++ }; ++ ++ /* GE0 CON1 */ ++ ethernet@70000 { ++ pinctrl-names = "default"; ++ /* ++ * The Reference Clock 0 is used to provide a ++ * clock to the PHY ++ */ ++ pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>; ++ status = "okay"; ++ phy = <&phy0>; ++ phy-mode = "rgmii-id"; ++ }; ++ ++ ++ mdio@72004 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mdio_pins>; ++ ++ phy0: ethernet-phy@1 { ++ reg = <1>; ++ }; ++ ++ phy1: ethernet-phy@0 { ++ reg = <0>; ++ }; ++ }; ++ ++ sata@a8000 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sata0_pins>, <&sata1_pins>; ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ sata@e0000 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sata2_pins>, <&sata3_pins>; ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ sdhci@d8000 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdhci_pins>; ++ cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>; ++ no-1-8-v; ++ wp-inverted; ++ bus-width = <8>; ++ status = "okay"; ++ }; ++ ++ /* CON5 */ ++ usb3@f0000 { ++ vcc-supply = <®_usb2_1_vbus>; ++ status = "okay"; ++ }; ++ ++ /* CON7 */ ++ usb3@f8000 { ++ vcc-supply = <®_usb3_vbus>; ++ status = "okay"; ++ }; ++ }; ++ ++ pcie-controller { ++ status = "okay"; ++ /* ++ * One PCIe units is accessible through ++ * standard PCIe slot on the board. ++ */ ++ pcie@1,0 { ++ /* Port 0, Lane 0 */ ++ status = "okay"; ++ }; ++ ++ /* ++ * The two other PCIe units are accessible ++ * through mini PCIe slot on the board. ++ */ ++ pcie@2,0 { ++ /* Port 1, Lane 0 */ ++ status = "okay"; ++ }; ++ pcie@3,0 { ++ /* Port 2, Lane 0 */ ++ status = "okay"; ++ }; ++ }; ++ ++ gpio-fan { ++ compatible = "gpio-fan"; ++ gpios = <&expander1 3 GPIO_ACTIVE_HIGH>; ++ gpio-fan,speed-map = < 0 0 ++ 3000 1>; ++ }; ++ }; ++ ++ reg_usb3_vbus: usb3-vbus { ++ compatible = "regulator-fixed"; ++ regulator-name = "usb3-vbus"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ enable-active-high; ++ regulator-always-on; ++ gpio = <&expander1 15 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ reg_usb2_0_vbus: v5-vbus0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "v5.0-vbus0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ enable-active-high; ++ regulator-always-on; ++ gpio = <&expander1 14 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ reg_usb2_1_vbus: v5-vbus1 { ++ compatible = "regulator-fixed"; ++ regulator-name = "v5.0-vbus1"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ enable-active-high; ++ regulator-always-on; ++ gpio = <&expander0 4 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ reg_usb2_1_vbus: v5-vbus1 { ++ compatible = "regulator-fixed"; ++ regulator-name = "v5.0-vbus1"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ enable-active-high; ++ regulator-always-on; ++ gpio = <&expander0 4 GPIO_ACTIVE_HIGH>; ++ }; ++}; ++ ++&pinctrl { ++ pca0_pins: pca0_pins { ++ marvell,pins = "mpp18"; ++ marvell,function = "gpio"; ++ }; ++}; diff --git a/target/linux/mvebu/patches-3.18/099-build_linksys_a385_dts.patch b/target/linux/mvebu/patches-3.18/099-build_linksys_a385_dts.patch index b55bba1..7360298 100644 --- a/target/linux/mvebu/patches-3.18/099-build_linksys_a385_dts.patch +++ b/target/linux/mvebu/patches-3.18/099-build_linksys_a385_dts.patch @@ -1,11 +1,11 @@ --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile -@@ -501,6 +501,8 @@ dtb-$(CONFIG_MACH_ARMADA_375) += \ +@@ -500,6 +500,8 @@ dtb-$(CONFIG_MACH_ARMADA_375) += \ + armada-375-db.dtb dtb-$(CONFIG_MACH_ARMADA_38X) += \ - armada-385-db.dtb \ armada-385-db-ap.dtb \ + armada-385-linksys-caiman.dtb \ + armada-385-linksys-cobra.dtb \ - armada-385-rd.dtb - dtb-$(CONFIG_MACH_ARMADA_XP) += \ - armada-xp-axpwifiap.dtb \ + armada-388-db.dtb \ + armada-388-gp.dtb \ + armada-388-rd.dtb diff --git a/target/linux/mvebu/patches-3.18/207-armada-385-rd-mtd-partitions.patch b/target/linux/mvebu/patches-3.18/207-armada-385-rd-mtd-partitions.patch index 80cec30..f0386a6 100644 --- a/target/linux/mvebu/patches-3.18/207-armada-385-rd-mtd-partitions.patch +++ b/target/linux/mvebu/patches-3.18/207-armada-385-rd-mtd-partitions.patch @@ -1,6 +1,6 @@ ---- a/arch/arm/boot/dts/armada-385-rd.dts -+++ b/arch/arm/boot/dts/armada-385-rd.dts -@@ -42,6 +42,16 @@ +--- a/arch/arm/boot/dts/armada-388-rd.dts ++++ b/arch/arm/boot/dts/armada-388-rd.dts +@@ -43,6 +43,16 @@ compatible = "st,m25p128"; reg = <0>; /* Chip select 0 */ spi-max-frequency = <108000000>; diff --git a/target/linux/mvebu/patches-3.18/209-armada-385-gp-mtd-partitions.patch b/target/linux/mvebu/patches-3.18/209-armada-385-gp-mtd-partitions.patch new file mode 100644 index 0000000..c662274 --- /dev/null +++ b/target/linux/mvebu/patches-3.18/209-armada-385-gp-mtd-partitions.patch @@ -0,0 +1,19 @@ +--- a/arch/arm/boot/dts/armada-388-gp.dts ++++ b/arch/arm/boot/dts/armada-388-gp.dts +@@ -74,6 +74,16 @@ + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <50000000>; + m25p,fast-read; ++ ++ partition@0 { ++ label = "uboot"; ++ reg = <0 0x400000>; ++ }; ++ ++ partition@1 { ++ label = "firmware"; ++ reg = <0x400000 0xc00000>; ++ }; + }; + }; + diff --git a/target/linux/mvebu/patches-3.18/300-add_missing_labels.patch b/target/linux/mvebu/patches-3.18/300-add_missing_labels.patch index b674b56..2ee65e6 100644 --- a/target/linux/mvebu/patches-3.18/300-add_missing_labels.patch +++ b/target/linux/mvebu/patches-3.18/300-add_missing_labels.patch @@ -18,7 +18,7 @@ compatible = "marvell,mv88f6820-pinctrl"; reg = <0x18000 0x20>; -@@ -412,7 +412,7 @@ +@@ -459,7 +459,7 @@ status = "disabled"; }; diff --git a/target/linux/mvebu/patches-3.18/600-armada_38x_rtc.patch b/target/linux/mvebu/patches-3.18/600-armada_38x_rtc.patch index 399421d..42f2568 100644 --- a/target/linux/mvebu/patches-3.18/600-armada_38x_rtc.patch +++ b/target/linux/mvebu/patches-3.18/600-armada_38x_rtc.patch @@ -387,7 +387,7 @@ M: Sebastian Hesselbarth --- a/arch/arm/boot/dts/armada-38x.dtsi +++ b/arch/arm/boot/dts/armada-38x.dtsi -@@ -420,6 +420,13 @@ +@@ -467,6 +467,13 @@ clocks = <&gateclk 4>; }; diff --git a/target/linux/mvebu/patches-4.0/209-armada-385-gp-mtd-partitions.patch b/target/linux/mvebu/patches-4.0/209-armada-385-gp-mtd-partitions.patch new file mode 100644 index 0000000..c662274 --- /dev/null +++ b/target/linux/mvebu/patches-4.0/209-armada-385-gp-mtd-partitions.patch @@ -0,0 +1,19 @@ +--- a/arch/arm/boot/dts/armada-388-gp.dts ++++ b/arch/arm/boot/dts/armada-388-gp.dts +@@ -74,6 +74,16 @@ + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <50000000>; + m25p,fast-read; ++ ++ partition@0 { ++ label = "uboot"; ++ reg = <0 0x400000>; ++ }; ++ ++ partition@1 { ++ label = "firmware"; ++ reg = <0x400000 0xc00000>; ++ }; + }; + }; + diff --git a/target/linux/mvebu/profiles/marvell.mk b/target/linux/mvebu/profiles/marvell.mk index e8ca9bd..68885df 100644 --- a/target/linux/mvebu/profiles/marvell.mk +++ b/target/linux/mvebu/profiles/marvell.mk @@ -35,19 +35,35 @@ endef $(eval $(call Profile,370-RD)) -define Profile/385-RD - NAME:=Marvell Armada 385 RD (RD-88F6820-AP) +define Profile/388-GP + NAME:=Marvell Armada 388 GP (DB-88F6820-GP) + PACKAGES:= \ + kmod-mmc kmod-sdhci kmod-sdhci-pxav3 \ + kmod-ata-core kmod-ata-marvell-sata \ + kmod-usb2 kmod-usb3 kmod-usb-storage \ + kmod-i2c-core kmod-i2c-mv64xxx kmod-gpio-pca953x \ + kmod-rtc-armada38x kmod-thermal-armada +endef + +define Profile/388-GP/Description + Package set compatible with the Armada 385 general purpose development board (DB-88F6820-GP). +endef + +$(eval $(call Profile,388-GP)) + +define Profile/388-RD + NAME:=Marvell Armada 388 RD (RD-88F6820-AP) PACKAGES:= \ kmod-mmc kmod-mvsdio kmod-usb3 kmod-usb-storage \ kmod-i2c-core kmod-i2c-mv64xxx \ kmod-thermal-armada endef -define Profile/385-RD/Description +define Profile/388-RD/Description Package set compatible with the Armada 385 reference design board (RD-88F6820-AP). endef -$(eval $(call Profile,385-RD)) +$(eval $(call Profile,388-RD)) define Profile/385-DB-AP NAME:=Marvell Armada 385 DB AP (DB-88F6820-AP)