From patchwork Tue Aug 4 21:55:31 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Olivari X-Patchwork-Id: 503833 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from arrakis.dune.hu (arrakis.dune.hu [78.24.191.176]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id B050214027C for ; Wed, 5 Aug 2015 07:59:55 +1000 (AEST) Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id C4FD52846CE; Tue, 4 Aug 2015 23:58:28 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on arrakis.dune.hu X-Spam-Level: X-Spam-Status: No, score=-1.5 required=5.0 tests=BAYES_00, T_RP_MATCHES_RCVD autolearn=unavailable version=3.3.2 Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id 00EC9287562 for ; Tue, 4 Aug 2015 23:55:49 +0200 (CEST) X-policyd-weight: using cached result; rate: -7.6 Received: from smtp.codeaurora.org (smtp.codeaurora.org [198.145.29.96]) by arrakis.dune.hu (Postfix) with ESMTPS for ; Tue, 4 Aug 2015 23:55:20 +0200 (CEST) Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id A9A801405C3; Tue, 4 Aug 2015 21:55:53 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 9CD38140835; Tue, 4 Aug 2015 21:55:53 +0000 (UTC) Received: from mathieu-linux.qualcomm.com (qf-scl1nat.qualcomm.com [207.114.132.30]) (using TLSv1.2 with cipher AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mathieu@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 90CCC140832; Tue, 4 Aug 2015 21:55:51 +0000 (UTC) From: Mathieu Olivari To: nbd@openwrt.org, jogo@openwrt.org, blogic@openwrt.org Date: Tue, 4 Aug 2015 14:55:31 -0700 Message-Id: <1438725332-19984-3-git-send-email-mathieu@codeaurora.org> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1438725332-19984-1-git-send-email-mathieu@codeaurora.org> References: <1438725332-19984-1-git-send-email-mathieu@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP Cc: openwrt-devel@lists.openwrt.org Subject: [OpenWrt-Devel] [PATCH 3/4] ipq806x: fix pcie pinmux naming in ipq806x dts X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: openwrt-devel-bounces@lists.openwrt.org Sender: "openwrt-devel" PCIe controller nodes are numbers 0/1/2 in the chipset dtsi file, but the pinmux nodes are numbers 1/2/3. We'll make it consistent by changing the pinmux numbering to match the controller's one. Signed-off-by: Mathieu Olivari --- ...-qcom-add-pcie-nodes-to-ipq806x-platforms.patch | 31 +++++++++------------- ...RM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch | 10 +++---- ...-qcom-add-gmac-nodes-to-ipq806x-platforms.patch | 13 ++++----- ...-qcom-add-pcie-nodes-to-ipq806x-platforms.patch | 25 +++++++++-------- ...RM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch | 4 +-- ...-qcom-add-gmac-nodes-to-ipq806x-platforms.patch | 6 ++--- 6 files changed, 41 insertions(+), 48 deletions(-) diff --git a/target/linux/ipq806x/patches-3.18/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch b/target/linux/ipq806x/patches-3.18/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch index 80ac25f..bdc91fb 100644 --- a/target/linux/ipq806x/patches-3.18/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch +++ b/target/linux/ipq806x/patches-3.18/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch @@ -15,11 +15,11 @@ Signed-off-by: Mathieu Olivari --- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts -@@ -30,6 +30,22 @@ +@@ -35,6 +35,22 @@ bias-disable; }; -+ pcie1_pins: pcie1_pinmux { ++ pcie0_pins: pcie0_pinmux { + mux { + pins = "gpio3"; + drive-strength = <2>; @@ -27,7 +27,7 @@ Signed-off-by: Mathieu Olivari + }; + }; + -+ pcie2_pins: pcie2_pinmux { ++ pcie1_pins: pcie1_pinmux { + mux { + pins = "gpio48"; + drive-strength = <2>; @@ -38,7 +38,7 @@ Signed-off-by: Mathieu Olivari spi_pins: spi_pins { mux { pins = "gpio18", "gpio19", "gpio21"; -@@ -133,5 +149,19 @@ +@@ -138,5 +154,19 @@ usb30@1 { status = "ok"; }; @@ -46,14 +46,14 @@ Signed-off-by: Mathieu Olivari + pcie0: pci@1b500000 { + status = "ok"; + reset-gpio = <&qcom_pinmux 3 0>; -+ pinctrl-0 = <&pcie1_pins>; ++ pinctrl-0 = <&pcie0_pins>; + pinctrl-names = "default"; + }; + + pcie1: pci@1b700000 { + status = "ok"; + reset-gpio = <&qcom_pinmux 48 0>; -+ pinctrl-0 = <&pcie2_pins>; ++ pinctrl-0 = <&pcie1_pins>; + pinctrl-names = "default"; + }; }; @@ -64,7 +64,7 @@ Signed-off-by: Mathieu Olivari bias-disable; }; -+ pcie1_pins: pcie1_pinmux { ++ pcie0_pins: pcie0_pinmux { + mux { + pins = "gpio3"; + drive-strength = <2>; @@ -72,7 +72,7 @@ Signed-off-by: Mathieu Olivari + }; + }; + -+ pcie2_pins: pcie2_pinmux { ++ pcie1_pins: pcie1_pinmux { + mux { + pins = "gpio48"; + drive-strength = <2>; @@ -80,7 +80,7 @@ Signed-off-by: Mathieu Olivari + }; + }; + -+ pcie3_pins: pcie3_pinmux { ++ pcie2_pins: pcie2_pinmux { + mux { + pins = "gpio63"; + drive-strength = <2>; @@ -99,21 +99,21 @@ Signed-off-by: Mathieu Olivari + pcie0: pci@1b500000 { + status = "ok"; + reset-gpio = <&qcom_pinmux 3 0>; -+ pinctrl-0 = <&pcie1_pins>; ++ pinctrl-0 = <&pcie0_pins>; + pinctrl-names = "default"; + }; + + pcie1: pci@1b700000 { + status = "ok"; + reset-gpio = <&qcom_pinmux 48 0>; -+ pinctrl-0 = <&pcie2_pins>; ++ pinctrl-0 = <&pcie1_pins>; + pinctrl-names = "default"; + }; + + pcie2: pci@1b900000 { + status = "ok"; + reset-gpio = <&qcom_pinmux 63 0>; -+ pinctrl-0 = <&pcie3_pins>; ++ pinctrl-0 = <&pcie2_pins>; + pinctrl-names = "default"; + }; }; @@ -259,10 +259,3 @@ Signed-off-by: Mathieu Olivari hs_phy_1: phy@100f8800 { compatible = "qcom,dwc3-hs-usb-phy"; reg = <0x100f8800 0x30>; -@@ -389,6 +514,5 @@ - dr_mode = "host"; - }; - }; -- - }; - }; diff --git a/target/linux/ipq806x/patches-3.18/707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch b/target/linux/ipq806x/patches-3.18/707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch index 809d743..851682a 100644 --- a/target/linux/ipq806x/patches-3.18/707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch +++ b/target/linux/ipq806x/patches-3.18/707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch @@ -11,7 +11,7 @@ Signed-off-by: Mathieu Olivari --- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts -@@ -14,8 +14,9 @@ +@@ -19,8 +19,9 @@ }; }; @@ -22,7 +22,7 @@ Signed-off-by: Mathieu Olivari }; chosen { -@@ -54,6 +55,15 @@ +@@ -59,6 +60,15 @@ bias-none; }; }; @@ -38,8 +38,8 @@ Signed-off-by: Mathieu Olivari }; gsbi@16300000 { -@@ -163,5 +173,33 @@ - pinctrl-0 = <&pcie2_pins>; +@@ -168,5 +178,33 @@ + pinctrl-0 = <&pcie1_pins>; pinctrl-names = "default"; }; + @@ -99,7 +99,7 @@ Signed-off-by: Mathieu Olivari gsbi2: gsbi@12480000 { @@ -173,5 +183,44 @@ - pinctrl-0 = <&pcie3_pins>; + pinctrl-0 = <&pcie2_pins>; pinctrl-names = "default"; }; + diff --git a/target/linux/ipq806x/patches-3.18/708-ARM-dts-qcom-add-gmac-nodes-to-ipq806x-platforms.patch b/target/linux/ipq806x/patches-3.18/708-ARM-dts-qcom-add-gmac-nodes-to-ipq806x-platforms.patch index cce30b0..8d6e77a 100644 --- a/target/linux/ipq806x/patches-3.18/708-ARM-dts-qcom-add-gmac-nodes-to-ipq806x-platforms.patch +++ b/target/linux/ipq806x/patches-3.18/708-ARM-dts-qcom-add-gmac-nodes-to-ipq806x-platforms.patch @@ -12,7 +12,7 @@ Signed-off-by: Mathieu Olivari --- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts -@@ -64,6 +64,16 @@ +@@ -69,6 +69,16 @@ bias-disable; }; }; @@ -29,7 +29,7 @@ Signed-off-by: Mathieu Olivari }; gsbi@16300000 { -@@ -201,5 +211,26 @@ +@@ -206,5 +216,26 @@ reg = <4>; }; }; @@ -116,9 +116,9 @@ Signed-off-by: Mathieu Olivari }; --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi -@@ -638,5 +638,91 @@ - dr_mode = "host"; - }; +@@ -87,6 +87,92 @@ + clock-frequency = <32768>; + #clock-cells = <0>; }; + + nss_common: syscon@03000000 { @@ -207,4 +207,5 @@ Signed-off-by: Mathieu Olivari + status = "disabled"; + }; }; - }; + + kraitcc: clock-controller { diff --git a/target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch b/target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch index e494d32..df96ad5 100644 --- a/target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch +++ b/target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch @@ -19,7 +19,7 @@ Signed-off-by: Mathieu Olivari bias-disable; }; -+ pcie1_pins: pcie1_pinmux { ++ pcie0_pins: pcie0_pinmux { + mux { + pins = "gpio3"; + drive-strength = <2>; @@ -27,7 +27,7 @@ Signed-off-by: Mathieu Olivari + }; + }; + -+ pcie2_pins: pcie2_pinmux { ++ pcie1_pins: pcie1_pinmux { + mux { + pins = "gpio48"; + drive-strength = <2>; @@ -46,14 +46,14 @@ Signed-off-by: Mathieu Olivari + pcie0: pci@1b500000 { + status = "ok"; + reset-gpio = <&qcom_pinmux 3 0>; -+ pinctrl-0 = <&pcie1_pins>; ++ pinctrl-0 = <&pcie0_pins>; + pinctrl-names = "default"; + }; + + pcie1: pci@1b700000 { + status = "ok"; + reset-gpio = <&qcom_pinmux 48 0>; -+ pinctrl-0 = <&pcie2_pins>; ++ pinctrl-0 = <&pcie1_pins>; + pinctrl-names = "default"; + }; }; @@ -64,7 +64,7 @@ Signed-off-by: Mathieu Olivari bias-disable; }; -+ pcie1_pins: pcie1_pinmux { ++ pcie0_pins: pcie0_pinmux { + mux { + pins = "gpio3"; + drive-strength = <2>; @@ -72,7 +72,7 @@ Signed-off-by: Mathieu Olivari + }; + }; + -+ pcie2_pins: pcie2_pinmux { ++ pcie1_pins: pcie1_pinmux { + mux { + pins = "gpio48"; + drive-strength = <2>; @@ -80,7 +80,7 @@ Signed-off-by: Mathieu Olivari + }; + }; + -+ pcie3_pins: pcie3_pinmux { ++ pcie2_pins: pcie2_pinmux { + mux { + pins = "gpio63"; + drive-strength = <2>; @@ -99,21 +99,21 @@ Signed-off-by: Mathieu Olivari + pcie0: pci@1b500000 { + status = "ok"; + reset-gpio = <&qcom_pinmux 3 0>; -+ pinctrl-0 = <&pcie1_pins>; ++ pinctrl-0 = <&pcie0_pins>; + pinctrl-names = "default"; + }; + + pcie1: pci@1b700000 { + status = "ok"; + reset-gpio = <&qcom_pinmux 48 0>; -+ pinctrl-0 = <&pcie2_pins>; ++ pinctrl-0 = <&pcie1_pins>; + pinctrl-names = "default"; + }; + + pcie2: pci@1b900000 { + status = "ok"; + reset-gpio = <&qcom_pinmux 63 0>; -+ pinctrl-0 = <&pcie3_pins>; ++ pinctrl-0 = <&pcie2_pins>; + pinctrl-names = "default"; + }; }; @@ -125,11 +125,11 @@ Signed-off-by: Mathieu Olivari #include #include +#include -+#include ++#include / { model = "Qualcomm IPQ8064"; -@@ -329,5 +331,128 @@ +@@ -329,5 +331,127 @@ #reset-cells = <1>; }; @@ -255,6 +255,5 @@ Signed-off-by: Mathieu Olivari + + status = "disabled"; + }; -+ }; }; diff --git a/target/linux/ipq806x/patches-4.1/707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch b/target/linux/ipq806x/patches-4.1/707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch index 846f738..f327050 100644 --- a/target/linux/ipq806x/patches-4.1/707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch +++ b/target/linux/ipq806x/patches-4.1/707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch @@ -39,7 +39,7 @@ Signed-off-by: Mathieu Olivari gsbi@16300000 { @@ -144,5 +154,33 @@ - pinctrl-0 = <&pcie2_pins>; + pinctrl-0 = <&pcie1_pins>; pinctrl-names = "default"; }; + @@ -99,7 +99,7 @@ Signed-off-by: Mathieu Olivari gsbi2: gsbi@12480000 { @@ -173,5 +183,44 @@ - pinctrl-0 = <&pcie3_pins>; + pinctrl-0 = <&pcie2_pins>; pinctrl-names = "default"; }; + diff --git a/target/linux/ipq806x/patches-4.1/708-ARM-dts-qcom-add-gmac-nodes-to-ipq806x-platforms.patch b/target/linux/ipq806x/patches-4.1/708-ARM-dts-qcom-add-gmac-nodes-to-ipq806x-platforms.patch index 8019713..7f290d9 100644 --- a/target/linux/ipq806x/patches-4.1/708-ARM-dts-qcom-add-gmac-nodes-to-ipq806x-platforms.patch +++ b/target/linux/ipq806x/patches-4.1/708-ARM-dts-qcom-add-gmac-nodes-to-ipq806x-platforms.patch @@ -116,10 +116,11 @@ Signed-off-by: Mathieu Olivari }; --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi -@@ -578,5 +578,91 @@ +@@ -577,5 +577,91 @@ + status = "disabled"; }; - ++ + nss_common: syscon@03000000 { + compatible = "syscon"; + reg = <0x03000000 0x0000FFFF>; @@ -205,6 +206,5 @@ Signed-off-by: Mathieu Olivari + + status = "disabled"; + }; -+ }; };