diff mbox

[OpenWrt-Devel,v2] ar71xx: Allow to use ath79_gpio_output_select on QCA955x

Message ID 1437412218-5877-1-git-send-email-sven@open-mesh.com
State Accepted
Headers show

Commit Message

Sven Eckelmann July 20, 2015, 5:10 p.m. UTC 
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
---
v2: Rebased to fix conflict with r46207

 ...79-add-gpio-func-register-for-QCA955x-SoC.patch | 60 ++++++++++++++++++++++
 ...79-add-gpio-func-register-for-QCA955x-SoC.patch | 60 ++++++++++++++++++++++
 2 files changed, 120 insertions(+)
 create mode 100644 target/linux/ar71xx/patches-3.18/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch
 create mode 100644 target/linux/ar71xx/patches-4.1/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch

Comments

Steve Brown July 29, 2015, 6:26 p.m. UTC | #1 
Sven,

On Mon, 2015-07-20 at 19:10 +0200, Sven Eckelmann wrote:
> Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
> ---
> v2: Rebased to fix conflict with r46207
> 
>  ...79-add-gpio-func-register-for-QCA955x-SoC.patch | 60 ++++++++++++++++++++++
>  ...79-add-gpio-func-register-for-QCA955x-SoC.patch | 60 ++++++++++++++++++++++
>  2 files changed, 120 insertions(+)
>  create mode 100644 target/linux/ar71xx/patches-3.18/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch
>  create mode 100644 target/linux/ar71xx/patches-4.1/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch
> 

<snip>
> ++		reg_base = AR934X_GPIO_REG_OUT_FUNC0;
> ++	} else if (soc_is_qca953x()) {
> ++		reg_base = QCA953X_GPIO_COUNT;
                 ^^^^^^^^
> ++		reg_base = QCA953X_GPIO_REG_OUT_FUNC0;
> ++	} else if (soc_is_qca955x()) {
> ++		gpio_count = QCA955X_GPIO_COUNT;
> ++		reg_base = QCA955X_GPIO_REG_OUT_FUNC0;
> ++	} else {
> ++		BUG();
<snip>

This patch gives me a compile error when building Netgear/wndr3700
claiming that gpio_base is possibly undefined. 

Should the above to be gpio_base and not reg_base?

Steve
diff mbox

Patch

diff --git a/target/linux/ar71xx/patches-3.18/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch b/target/linux/ar71xx/patches-3.18/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch
new file mode 100644
index 0000000..af828b0
--- /dev/null
+++ b/target/linux/ar71xx/patches-3.18/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch
@@ -0,0 +1,60 @@ 
+--- a/arch/mips/ath79/gpio.c
++++ b/arch/mips/ath79/gpio.c
+@@ -185,15 +185,27 @@ void __init ath79_gpio_output_select(uns
+ {
+ 	void __iomem *base = ath79_gpio_base;
+ 	unsigned long flags;
+-	unsigned int reg;
++	unsigned int reg, reg_base;
++	unsigned long gpio_count;
+ 	u32 t, s;
+ 
+-	BUG_ON(!soc_is_ar934x() && !soc_is_qca953x());
++	if (soc_is_ar934x()) {
++		gpio_count = AR934X_GPIO_COUNT;
++		reg_base = AR934X_GPIO_REG_OUT_FUNC0;
++	} else if (soc_is_qca953x()) {
++		reg_base = QCA953X_GPIO_COUNT;
++		reg_base = QCA953X_GPIO_REG_OUT_FUNC0;
++	} else if (soc_is_qca955x()) {
++		gpio_count = QCA955X_GPIO_COUNT;
++		reg_base = QCA955X_GPIO_REG_OUT_FUNC0;
++	} else {
++		BUG();
++	}
+ 
+-	if (gpio >= AR934X_GPIO_COUNT)
++	if (gpio >= gpio_count)
+ 		return;
+ 
+-	reg = AR934X_GPIO_REG_OUT_FUNC0 + 4 * (gpio / 4);
++	reg = reg_base + 4 * (gpio / 4);
+ 	s = 8 * (gpio % 4);
+ 
+ 	spin_lock_irqsave(&ath79_gpio_lock, flags);
+--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+@@ -868,6 +868,14 @@
+ #define QCA953X_GPIO_OUT_MUX_LED_LINK4		44
+ #define QCA953X_GPIO_OUT_MUX_LED_LINK5		45
+ 
++#define QCA955X_GPIO_REG_OUT_FUNC0	0x2c
++#define QCA955X_GPIO_REG_OUT_FUNC1	0x30
++#define QCA955X_GPIO_REG_OUT_FUNC2	0x34
++#define QCA955X_GPIO_REG_OUT_FUNC3	0x38
++#define QCA955X_GPIO_REG_OUT_FUNC4	0x3c
++#define QCA955X_GPIO_REG_OUT_FUNC5	0x40
++#define QCA955X_GPIO_REG_FUNC		0x6c
++
+ #define QCA956X_GPIO_REG_OUT_FUNC0	0x2c
+ #define QCA956X_GPIO_REG_OUT_FUNC1	0x30
+ #define QCA956X_GPIO_REG_OUT_FUNC2	0x34
+@@ -1007,6 +1015,8 @@
+ #define AR934X_GPIO_OUT_EXT_LNA0	46
+ #define AR934X_GPIO_OUT_EXT_LNA1	47
+ 
++#define QCA955X_GPIO_OUT_GPIO		0
++
+ /*
+  * MII_CTRL block
+  */
diff --git a/target/linux/ar71xx/patches-4.1/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch b/target/linux/ar71xx/patches-4.1/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch
new file mode 100644
index 0000000..af828b0
--- /dev/null
+++ b/target/linux/ar71xx/patches-4.1/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch
@@ -0,0 +1,60 @@ 
+--- a/arch/mips/ath79/gpio.c
++++ b/arch/mips/ath79/gpio.c
+@@ -185,15 +185,27 @@ void __init ath79_gpio_output_select(uns
+ {
+ 	void __iomem *base = ath79_gpio_base;
+ 	unsigned long flags;
+-	unsigned int reg;
++	unsigned int reg, reg_base;
++	unsigned long gpio_count;
+ 	u32 t, s;
+ 
+-	BUG_ON(!soc_is_ar934x() && !soc_is_qca953x());
++	if (soc_is_ar934x()) {
++		gpio_count = AR934X_GPIO_COUNT;
++		reg_base = AR934X_GPIO_REG_OUT_FUNC0;
++	} else if (soc_is_qca953x()) {
++		reg_base = QCA953X_GPIO_COUNT;
++		reg_base = QCA953X_GPIO_REG_OUT_FUNC0;
++	} else if (soc_is_qca955x()) {
++		gpio_count = QCA955X_GPIO_COUNT;
++		reg_base = QCA955X_GPIO_REG_OUT_FUNC0;
++	} else {
++		BUG();
++	}
+ 
+-	if (gpio >= AR934X_GPIO_COUNT)
++	if (gpio >= gpio_count)
+ 		return;
+ 
+-	reg = AR934X_GPIO_REG_OUT_FUNC0 + 4 * (gpio / 4);
++	reg = reg_base + 4 * (gpio / 4);
+ 	s = 8 * (gpio % 4);
+ 
+ 	spin_lock_irqsave(&ath79_gpio_lock, flags);
+--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+@@ -868,6 +868,14 @@
+ #define QCA953X_GPIO_OUT_MUX_LED_LINK4		44
+ #define QCA953X_GPIO_OUT_MUX_LED_LINK5		45
+ 
++#define QCA955X_GPIO_REG_OUT_FUNC0	0x2c
++#define QCA955X_GPIO_REG_OUT_FUNC1	0x30
++#define QCA955X_GPIO_REG_OUT_FUNC2	0x34
++#define QCA955X_GPIO_REG_OUT_FUNC3	0x38
++#define QCA955X_GPIO_REG_OUT_FUNC4	0x3c
++#define QCA955X_GPIO_REG_OUT_FUNC5	0x40
++#define QCA955X_GPIO_REG_FUNC		0x6c
++
+ #define QCA956X_GPIO_REG_OUT_FUNC0	0x2c
+ #define QCA956X_GPIO_REG_OUT_FUNC1	0x30
+ #define QCA956X_GPIO_REG_OUT_FUNC2	0x34
+@@ -1007,6 +1015,8 @@
+ #define AR934X_GPIO_OUT_EXT_LNA0	46
+ #define AR934X_GPIO_OUT_EXT_LNA1	47
+ 
++#define QCA955X_GPIO_OUT_GPIO		0
++
+ /*
+  * MII_CTRL block
+  */