diff mbox

[OpenWrt-Devel,1/2] ar71xx: fix ethernet packet loss issues on OM5P-AN

Message ID 1428679612-6246-1-git-send-email-sven@open-mesh.com
State Accepted
Headers show

Commit Message

Sven Eckelmann April 10, 2015, 3:26 p.m. UTC
The OM5P-AN boards are suffering from ethernet packet loss when booting with
some active POE setups or when switching to Fast Ethernet when previously
booted with Gigabit ethernet attached.

The cause of the problem is that the AR8035 PHYs requires special register
settings to work reliably on these boards. Enable the RGMII TX, RX delays and
disable SmartEE functionality of the AR8035 PHYs. Also enable the RXD and RDV
delay in the ETH_CFG register to fix the issue.

Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
---
Based on a patch from Gabor Juhos <juhosg@openwrt.org> (r40509) for rb91x

 .../linux/ar71xx/files/arch/mips/ath79/mach-om5p.c | 22 +++++++++++++++++++++-
 1 file changed, 21 insertions(+), 1 deletion(-)

Comments

Daniel Golle April 10, 2015, 3:39 p.m. UTC | #1
Hi!

Sorry for hijacking this thread...
I observed some recent ubiquiti gear suffering from similar issues,
suspected the hardware being broken or some EE functionality missing in
the driver as the issue usually occurs after some time of inactivity...
My logs repeatedly get filled with stuff like that:
Fri Apr 10 17:31:07 2015 kern.info kernel: [75029.020000] eth0: tx timeout
Fri Apr 10 17:31:07 2015 kern.info kernel: [75029.020000] eth0: link down
Fri Apr 10 17:31:08 2015 kern.info kernel: [75029.850000] eth0: link up (100Mbps/Full duplex)

Observed on ubnt nanostation loco m5 xw and recent bullet m5 with phy
having phy_id 0x004dd041

Could that be related?

Cheers


Daniel


On Fri, Apr 10, 2015 at 05:26:51PM +0200, Sven Eckelmann wrote:
> The OM5P-AN boards are suffering from ethernet packet loss when booting with
> some active POE setups or when switching to Fast Ethernet when previously
> booted with Gigabit ethernet attached.
> 
> The cause of the problem is that the AR8035 PHYs requires special register
> settings to work reliably on these boards. Enable the RGMII TX, RX delays and
> disable SmartEE functionality of the AR8035 PHYs. Also enable the RXD and RDV
> delay in the ETH_CFG register to fix the issue.
> 
> Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
> ---
> Based on a patch from Gabor Juhos <juhosg@openwrt.org> (r40509) for rb91x
> 
>  .../linux/ar71xx/files/arch/mips/ath79/mach-om5p.c | 22 +++++++++++++++++++++-
>  1 file changed, 21 insertions(+), 1 deletion(-)
> 
> diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c
> index 7f1d811..272e410 100644
> --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c
> +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c
> @@ -16,6 +16,7 @@
>  #include <linux/i2c.h>
>  #include <linux/i2c-algo-bit.h>
>  #include <linux/i2c-gpio.h>
> +#include <linux/platform_data/phy-at803x.h>
>  
>  #include <asm/mach-ath79/ar71xx_regs.h>
>  #include <asm/mach-ath79/ath79.h>
> @@ -150,6 +151,20 @@ static struct i2c_board_info om5pan_i2c_devs[] __initdata = {
>  	},
>  };
>  
> +static struct at803x_platform_data om5p_an_at803x_data = {
> +	.disable_smarteee = 1,
> +	.enable_rgmii_rx_delay = 1,
> +	.enable_rgmii_tx_delay = 1,
> +};
> +
> +static struct mdio_board_info om5p_an_mdio0_info[] = {
> +	{
> +		.bus_id = "ag71xx-mdio.0",
> +		.phy_addr = 7,
> +		.platform_data = &om5p_an_at803x_data,
> +	},
> +};
> +
>  static void __init om5p_an_setup(void)
>  {
>  	u8 *art = (u8 *)KSEG1ADDR(0x1fff0000);
> @@ -171,10 +186,15 @@ static void __init om5p_an_setup(void)
>  	ath79_init_mac(mac, art, 0x02);
>  	ath79_register_wmac(art + OM5P_WMAC_CALDATA_OFFSET, mac);
>  
> -	ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
> +	ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
> +				   AR934X_ETH_CFG_RXD_DELAY |
> +				   AR934X_ETH_CFG_RDV_DELAY);
>  	ath79_register_mdio(0, 0x0);
>  	ath79_register_mdio(1, 0x0);
>  
> +	mdiobus_register_board_info(om5p_an_mdio0_info,
> +				    ARRAY_SIZE(om5p_an_mdio0_info));
> +
>  	ath79_init_mac(ath79_eth0_data.mac_addr, art, 0x00);
>  	ath79_init_mac(ath79_eth1_data.mac_addr, art, 0x01);
>  
> -- 
> 2.1.4
> _______________________________________________
> openwrt-devel mailing list
> openwrt-devel@lists.openwrt.org
> https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Felix Fietkau April 13, 2015, 8:59 a.m. UTC | #2
On 2015-04-10 17:39, Daniel Golle wrote:
> Hi!
> 
> Sorry for hijacking this thread...
> I observed some recent ubiquiti gear suffering from similar issues,
> suspected the hardware being broken or some EE functionality missing in
> the driver as the issue usually occurs after some time of inactivity...
> My logs repeatedly get filled with stuff like that:
> Fri Apr 10 17:31:07 2015 kern.info kernel: [75029.020000] eth0: tx timeout
> Fri Apr 10 17:31:07 2015 kern.info kernel: [75029.020000] eth0: link down
> Fri Apr 10 17:31:08 2015 kern.info kernel: [75029.850000] eth0: link up (100Mbps/Full duplex)
> 
> Observed on ubnt nanostation loco m5 xw and recent bullet m5 with phy
> having phy_id 0x004dd041
Please post a full boot log of both affected devices.

- Felix
Lars Kruse April 13, 2015, 11:22 a.m. UTC | #3
Hi,

> > Observed on ubnt nanostation loco m5 xw and recent bullet m5 with phy
> > having phy_id 0x004dd041
> Please post a full boot log of both affected devices.

I assume that Daniel is referring to this issue:
 https://dev.openwrt.org/ticket/19085

I just uploaded the output of dmesg:
 https://dev.openwrt.org/attachment/ticket/19085/nanostation_loco_xw_boot.log

Cheers,
Lars
diff mbox

Patch

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c
index 7f1d811..272e410 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c
@@ -16,6 +16,7 @@ 
 #include <linux/i2c.h>
 #include <linux/i2c-algo-bit.h>
 #include <linux/i2c-gpio.h>
+#include <linux/platform_data/phy-at803x.h>
 
 #include <asm/mach-ath79/ar71xx_regs.h>
 #include <asm/mach-ath79/ath79.h>
@@ -150,6 +151,20 @@  static struct i2c_board_info om5pan_i2c_devs[] __initdata = {
 	},
 };
 
+static struct at803x_platform_data om5p_an_at803x_data = {
+	.disable_smarteee = 1,
+	.enable_rgmii_rx_delay = 1,
+	.enable_rgmii_tx_delay = 1,
+};
+
+static struct mdio_board_info om5p_an_mdio0_info[] = {
+	{
+		.bus_id = "ag71xx-mdio.0",
+		.phy_addr = 7,
+		.platform_data = &om5p_an_at803x_data,
+	},
+};
+
 static void __init om5p_an_setup(void)
 {
 	u8 *art = (u8 *)KSEG1ADDR(0x1fff0000);
@@ -171,10 +186,15 @@  static void __init om5p_an_setup(void)
 	ath79_init_mac(mac, art, 0x02);
 	ath79_register_wmac(art + OM5P_WMAC_CALDATA_OFFSET, mac);
 
-	ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
+	ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
+				   AR934X_ETH_CFG_RXD_DELAY |
+				   AR934X_ETH_CFG_RDV_DELAY);
 	ath79_register_mdio(0, 0x0);
 	ath79_register_mdio(1, 0x0);
 
+	mdiobus_register_board_info(om5p_an_mdio0_info,
+				    ARRAY_SIZE(om5p_an_mdio0_info));
+
 	ath79_init_mac(ath79_eth0_data.mac_addr, art, 0x00);
 	ath79_init_mac(ath79_eth1_data.mac_addr, art, 0x01);