From patchwork Tue Feb 24 05:01:59 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Olivari X-Patchwork-Id: 442796 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from arrakis.dune.hu (arrakis.dune.hu [78.24.191.176]) (using TLSv1.1 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 5799A140159 for ; Tue, 24 Feb 2015 16:05:00 +1100 (AEDT) Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id DC06728C017; Tue, 24 Feb 2015 06:02:45 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on arrakis.dune.hu X-Spam-Level: X-Spam-Status: No, score=-1.5 required=5.0 tests=BAYES_00, T_RP_MATCHES_RCVD autolearn=unavailable version=3.3.2 Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id 7996328BE51 for ; Tue, 24 Feb 2015 06:02:19 +0100 (CET) X-policyd-weight: using cached result; rate:hard: -7.6 Received: from smtp.codeaurora.org (smtp.codeaurora.org [198.145.29.96]) by arrakis.dune.hu (Postfix) with ESMTPS for ; Tue, 24 Feb 2015 06:02:18 +0100 (CET) Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 4BA0C140299; Tue, 24 Feb 2015 05:02:25 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 3BB8214028C; Tue, 24 Feb 2015 05:02:25 +0000 (UTC) Received: from mathieu-linux.qualcomm.com (qf-scl1nat.qualcomm.com [207.114.132.30]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: mathieu@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 9995D14028E; Tue, 24 Feb 2015 05:02:24 +0000 (UTC) From: Mathieu Olivari To: blogic@openwrt.org Date: Mon, 23 Feb 2015 21:01:59 -0800 Message-Id: <1424754121-19468-3-git-send-email-mathieu@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1424754121-19468-1-git-send-email-mathieu@codeaurora.org> References: <1424754121-19468-1-git-send-email-mathieu@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP Cc: mmcclint@codeaurora.org, openwrt-devel@lists.openwrt.org Subject: [OpenWrt-Devel] [PATCH 2/4] ipq806x: enable GMAC support in DTS X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: openwrt-devel-bounces@lists.openwrt.org Sender: "openwrt-devel" This adds the GMAC entries in the ipq806x dtsi file as well as in the ap148 specific dts file. This also adds the MDIO change as well. Signed-off-by: Mathieu Olivari --- .../ipq806x/patches/700-add-gmac-dts-suport.patch | 172 +++++++++++++++++++++ 1 file changed, 172 insertions(+) create mode 100644 target/linux/ipq806x/patches/700-add-gmac-dts-suport.patch diff --git a/target/linux/ipq806x/patches/700-add-gmac-dts-suport.patch b/target/linux/ipq806x/patches/700-add-gmac-dts-suport.patch new file mode 100644 index 0000000..89ebe66 --- /dev/null +++ b/target/linux/ipq806x/patches/700-add-gmac-dts-suport.patch @@ -0,0 +1,172 @@ +--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts ++++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts +@@ -18,8 +18,15 @@ + bootargs = "console=ttyMSM0,115200 root=/dev/mtdblock12 rootfstype=squashfs,jffs2"; + }; + ++ aliases { ++ mdio-gpio0 = &mdio0; ++ }; ++ + soc { + pinmux@800000 { ++ pinctrl-0 = <&mdio0_pins &rgmii2_pins>; ++ pinctrl-names = "default"; ++ + i2c4_pins: i2c4_pinmux { + pins = "gpio12", "gpio13"; + function = "gsbi4"; +@@ -34,6 +41,25 @@ + bias-none; + }; + }; ++ ++ mdio0_pins: mdio0_pins { ++ mux { ++ pins = "gpio0", "gpio1"; ++ function = "gpio"; ++ drive-strength = <8>; ++ bias-disable; ++ }; ++ }; ++ ++ rgmii2_pins: rgmii2_pins { ++ mux { ++ pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", ++ "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ; ++ function = "rgmii2"; ++ drive-strength = <8>; ++ bias-disable; ++ }; ++ }; + }; + + gsbi@16300000 { +@@ -72,6 +98,7 @@ + #size-cells = <1>; + spi-max-frequency = <50000000>; + reg = <0>; ++ m25p,fast-read; + + partition@0 { + label = "0:SBL1"; +@@ -148,5 +175,66 @@ + sata@29000000 { + status = "ok"; + }; ++ ++ mdio0: mdio { ++ compatible = "virtual,mdio-gpio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>; ++ ++ phy0: ethernet-phy@0 { ++ device_type = "ethernet-phy"; ++ reg = <0>; ++ qca,ar8327-initvals = < ++ 0x00004 0x7600000 /* PAD0_MODE */ ++ 0x00008 0x1000000 /* PAD5_MODE */ ++ 0x0000c 0x80 /* PAD6_MODE */ ++ 0x000e4 0xaa545 /* MAC_POWER_SEL */ ++ 0x000e0 0xc74164de /* SGMII_CTRL */ ++ 0x0007c 0x4e /* PORT0_STATUS */ ++ 0x00094 0x4e /* PORT6_STATUS */ ++ >; ++ }; ++ ++ phy4: ethernet-phy@4 { ++ device_type = "ethernet-phy"; ++ reg = <4>; ++ }; ++ }; ++ ++ nss-gmac-common { ++ reg = <0x03000000 0x0000FFFF 0x1bb00000 0x0000FFFF 0x00900000 0x00004000>; ++ reg-names = "nss_reg_base" , "qsgmii_reg_base", "clk_ctl_base"; ++ }; ++ ++ gmac1: ethernet@37200000 { ++ status = "ok"; ++ phy-mode = "rgmii"; ++ qcom,id = <1>; ++ qcom,phy_mdio_addr = <4>; ++ qcom,poll_required = <1>; ++ qcom,rgmii_delay = <0>; ++ qcom,emulation = <0>; ++ qcom,forced_speed = <1000>; ++ qcom,forced_duplex = <1>; ++ qcom,socver = <0>; ++ local-mac-address = [000000000000]; ++ mdiobus = <&mdio0>; ++ }; ++ ++ gmac2: ethernet@37400000 { ++ status = "ok"; ++ phy-mode = "sgmii"; ++ qcom,id = <2>; ++ qcom,phy_mdio_addr = <0>; ++ qcom,poll_required = <0>; ++ qcom,rgmii_delay = <0>; ++ qcom,emulation = <0>; ++ qcom,forced_speed = <1000>; ++ qcom,forced_duplex = <1>; ++ qcom,socver = <0>; ++ local-mac-address = [000000000000]; ++ mdiobus = <&mdio0>; ++ }; + }; + }; +--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi +@@ -3,6 +3,7 @@ + #include "skeleton.dtsi" + #include + #include ++#include + + / { + model = "Qualcomm IPQ8064"; +@@ -279,5 +280,42 @@ + #clock-cells = <1>; + #reset-cells = <1>; + }; ++ ++ nss-gmac-common { ++ reg = <0x03000000 0x0000FFFF 0x1bb00000 0x0000FFFF 0x00900000 0x00004000>; ++ reg-names = "nss_reg_base" , "qsgmii_reg_base", "clk_ctl_base"; ++ }; ++ ++ gmac0: ethernet@37000000 { ++ device_type = "network"; ++ compatible = "qcom,nss-gmac"; ++ reg = <0x37000000 0x200000>; ++ interrupts = ; ++ status = "disabled"; ++ }; ++ ++ gmac1: ethernet@37200000 { ++ device_type = "network"; ++ compatible = "qcom,nss-gmac"; ++ reg = <0x37200000 0x200000>; ++ interrupts = ; ++ status = "disabled"; ++ }; ++ ++ gmac2: ethernet@37400000 { ++ device_type = "network"; ++ compatible = "qcom,nss-gmac"; ++ reg = <0x37400000 0x200000>; ++ interrupts = ; ++ status = "disabled"; ++ }; ++ ++ gmac3: ethernet@37600000 { ++ device_type = "network"; ++ compatible = "qcom,nss-gmac"; ++ reg = <0x37600000 0x200000>; ++ interrupts = ; ++ status = "disabled"; ++ }; + }; + };