From patchwork Wed Nov 25 18:43:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Van Haaren, Harry" X-Patchwork-Id: 1406219 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=openvswitch.org (client-ip=140.211.166.138; helo=whitealder.osuosl.org; envelope-from=ovs-dev-bounces@openvswitch.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4Ch8tm3MFhz9sRK for ; Thu, 26 Nov 2020 05:44:15 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by whitealder.osuosl.org (Postfix) with ESMTP id 0856C87138; Wed, 25 Nov 2020 18:44:13 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from whitealder.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id aW5EbAOkmuRj; Wed, 25 Nov 2020 18:44:10 +0000 (UTC) Received: from lists.linuxfoundation.org (lf-lists.osuosl.org [140.211.9.56]) by whitealder.osuosl.org (Postfix) with ESMTP id D0A9787150; Wed, 25 Nov 2020 18:44:08 +0000 (UTC) Received: from lf-lists.osuosl.org (localhost [127.0.0.1]) by lists.linuxfoundation.org (Postfix) with ESMTP id B33D5C1D9F; Wed, 25 Nov 2020 18:44:08 +0000 (UTC) X-Original-To: ovs-dev@openvswitch.org Delivered-To: ovs-dev@lists.linuxfoundation.org Received: from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133]) by lists.linuxfoundation.org (Postfix) with ESMTP id BE4B4C0052 for ; Wed, 25 Nov 2020 18:44:06 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by hemlock.osuosl.org (Postfix) with ESMTP id ADDC28755A for ; Wed, 25 Nov 2020 18:44:06 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from hemlock.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Ls95BRKDIsEU for ; Wed, 25 Nov 2020 18:44:06 +0000 (UTC) X-Greylist: domain auto-whitelisted by SQLgrey-1.7.6 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by hemlock.osuosl.org (Postfix) with ESMTPS id 3798987557 for ; Wed, 25 Nov 2020 18:44:06 +0000 (UTC) IronPort-SDR: tHfokjQLyx/PK2v25COxELUuS/HlOwUchdpWrkutNYO/Gy6tu2CBoeLfC0W1RKzx48wIYBFgFH QQCus18eLIDA== X-IronPort-AV: E=McAfee;i="6000,8403,9816"; a="169624125" X-IronPort-AV: E=Sophos;i="5.78,369,1599548400"; d="scan'208";a="169624125" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Nov 2020 10:44:06 -0800 IronPort-SDR: uf+MtMC4clnCE/joOH/v4IBBiN8B0GvZeN2tXo+oFGbH2xW/Amo0uDUdHkKsMXVmkXQa4jc9CF hoAP44eVmJZQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,369,1599548400"; d="scan'208";a="403379923" Received: from silpixa00400633.ir.intel.com ([10.237.213.210]) by orsmga001.jf.intel.com with ESMTP; 25 Nov 2020 10:44:04 -0800 From: Harry van Haaren To: ovs-dev@openvswitch.org Date: Wed, 25 Nov 2020 18:43:32 +0000 Message-Id: <20201125184342.2715681-2-harry.van.haaren@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201125184342.2715681-1-harry.van.haaren@intel.com> References: <20201118161501.1710801-1-harry.van.haaren@intel.com> <20201125184342.2715681-1-harry.van.haaren@intel.com> MIME-Version: 1.0 Cc: i.maximets@ovn.org Subject: [ovs-dev] [PATCH v4 01/11] dpdk: Cache result of CPU ISA checks X-BeenThere: ovs-dev@openvswitch.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: ovs-dev-bounces@openvswitch.org Sender: "dev" As a small optimization, this patch caches the result of a CPU ISA check from DPDK. Particularly in the case of running the DPCLS autovalidator (which repeatedly probes subtables) this reduces the amount of CPU ISA lookups from the DPDK level. By caching them at the OVS/dpdk.c level, the ISA checks remain runtime for the CPU where they are executed, but subsequent checks for the same ISA feature become much cheaper. Signed-off-by: Harry van Haaren Co-authored-by: Cian Ferriter Signed-off-by: Cian Ferriter --- In theory it is also possible to do the caching of the supported ISA at the usage site (aka, the DPCLS subtable search implementation) however that would cause a lot of code-duplication. By caching in the lower level, we get almost all the benefit with no code duplication. v3: - Add braces for single line if statements - Change wording of comment --- lib/dpdk.c | 26 ++++++++++++++++++++++---- 1 file changed, 22 insertions(+), 4 deletions(-) diff --git a/lib/dpdk.c b/lib/dpdk.c index 2f235a742..ae14d1730 100644 --- a/lib/dpdk.c +++ b/lib/dpdk.c @@ -614,13 +614,31 @@ print_dpdk_version(void) puts(rte_version()); } +/* Avoid calling rte_cpu_get_flag_enabled() excessively, by caching the + * result of the call for each CPU flag in a static variable. To avoid + * allocating large numbers of static variables, use a uint8 as a bitfield. + * Note the macro must only return if the ISA check is done and available. + */ +#define ISA_CHECK_DONE_BIT (1 << 0) +#define ISA_AVAILABLE_BIT (1 << 1) + #define CHECK_CPU_FEATURE(feature, name_str, RTE_CPUFLAG) \ do { \ if (strncmp(feature, name_str, strlen(name_str)) == 0) { \ - int has_isa = rte_cpu_get_flag_enabled(RTE_CPUFLAG); \ - VLOG_DBG("CPU flag %s, available %s\n", name_str, \ - has_isa ? "yes" : "no"); \ - return true; \ + static uint8_t isa_check_##RTE_CPUFLAG; \ + int check = isa_check_##RTE_CPUFLAG & ISA_CHECK_DONE_BIT; \ + if (OVS_UNLIKELY(!check)) { \ + int has_isa = rte_cpu_get_flag_enabled(RTE_CPUFLAG); \ + VLOG_DBG("CPU flag %s, available %s\n", \ + name_str, has_isa ? "yes" : "no"); \ + isa_check_##RTE_CPUFLAG = ISA_CHECK_DONE_BIT; \ + if (has_isa) { \ + isa_check_##RTE_CPUFLAG |= ISA_AVAILABLE_BIT; \ + } \ + } \ + if (isa_check_##RTE_CPUFLAG & ISA_AVAILABLE_BIT) { \ + return true; \ + } \ } \ } while (0)