| Message ID | 20260817090503.2104998-2-peter.lin@sifive.com |
|---|---|
| State | New |
| Headers | show |
| Series | Add RISC-V Worlds ISA support to OpenSBI | expand |
On Mon, Aug 17, 2026 at 2:05 AM Yu-Chien Peter Lin <peter.lin@sifive.com> wrote: > > Add CSR definitions for RISC-V Worlds (mwid, mlwid, mlwidlist, > mwiddeleg, slwid) and detect Worlds extensions via CSR probes > in hart_detect_features(). > > Signed-off-by: Yu-Chien Peter Lin <peter.lin@sifive.com> > --- > include/sbi/riscv_encoding.h | 12 ++++++++++++ > include/sbi/sbi_hart.h | 10 ++++++++++ > lib/sbi/sbi_hart.c | 26 ++++++++++++++++++++++++++ > 3 files changed, 48 insertions(+) > > diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h > index ffe7666c..e0262bfc 100644 > --- a/include/sbi/riscv_encoding.h > +++ b/include/sbi/riscv_encoding.h > @@ -400,6 +400,9 @@ > /* Supervisor Resource Management Configuration CSRs */ > #define CSR_SRMCFG 0x181 > > +/* Supervisor lower-privilege mode World ID CSR (Sswid) */ > +#define CSR_SLWID 0x190 > + > /* Machine-Level Control transfer records CSRs */ > #define CSR_MCTRCTL 0x34e > > @@ -520,6 +523,15 @@ > #define CSR_MTINST 0x34a > #define CSR_MTVAL2 0x34b > > +/* Machine World ID CSRs (Smwid, Smlwid, Smlwidlist, Smwiddeleg) */ > +#define CSR_MLWID 0x390 > +#define CSR_MWID 0x749 > +#define CSR_MWIDDELEG 0x748 > +#define CSR_MLWIDLIST 0x74A > + > +/* mwid lock bit */ > +#define MWID_LOCK (_UL(1) << (__riscv_xlen - 1)) > + > /* Machine Memory Protection */ > #define CSR_PMPCFG0 0x3a0 > #define CSR_PMPCFG1 0x3a1 > diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h > index 543393bb..2941809e 100644 > --- a/include/sbi/sbi_hart.h > +++ b/include/sbi/sbi_hart.h > @@ -95,6 +95,16 @@ enum sbi_hart_extensions { > SBI_HART_EXT_F, > /** Hart has D extension */ > SBI_HART_EXT_D, > + /** Hart has Smwid extension */ > + SBI_HART_EXT_SMWID, > + /** Hart has Smlwid extension */ > + SBI_HART_EXT_SMLWID, > + /** Hart has Smlwidlist extension */ > + SBI_HART_EXT_SMLWIDLIST, > + /** Hart has Smwiddeleg extension */ > + SBI_HART_EXT_SMWIDDELEG, > + /** Hart has Sswid extension */ > + SBI_HART_EXT_SSWID, > > /** Maximum index of Hart extension */ > SBI_HART_EXT_MAX, > diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c > index bee88557..f5f4062e 100644 > --- a/lib/sbi/sbi_hart.c > +++ b/lib/sbi/sbi_hart.c > @@ -360,6 +360,11 @@ const struct sbi_hart_ext_data sbi_hart_ext[] = { > __SBI_HART_EXT_DATA(v, SBI_HART_EXT_V), > __SBI_HART_EXT_DATA(f, SBI_HART_EXT_F), > __SBI_HART_EXT_DATA(d, SBI_HART_EXT_D), > + __SBI_HART_EXT_DATA(smwid, SBI_HART_EXT_SMWID), > + __SBI_HART_EXT_DATA(smlwid, SBI_HART_EXT_SMLWID), > + __SBI_HART_EXT_DATA(smlwidlist, SBI_HART_EXT_SMLWIDLIST), > + __SBI_HART_EXT_DATA(smwiddeleg, SBI_HART_EXT_SMWIDDELEG), > + __SBI_HART_EXT_DATA(sswid, SBI_HART_EXT_SSWID), > }; > > _Static_assert(SBI_HART_EXT_MAX == array_size(sbi_hart_ext), > @@ -647,9 +652,30 @@ __pmp_skip: > /* Detect if hart support sdtrig (debug triggers) */ > __check_ext_csr(SBI_HART_PRIV_VER_UNKNOWN, > CSR_TSELECT, SBI_HART_EXT_SDTRIG); > + /* Detect if hart supports Smwid */ > + __check_ext_csr(SBI_HART_PRIV_VER_UNKNOWN, > + CSR_MWID, SBI_HART_EXT_SMWID); > + /* Detect if hart supports Smlwid */ > + __check_ext_csr(SBI_HART_PRIV_VER_UNKNOWN, > + CSR_MLWID, SBI_HART_EXT_SMLWID); > + /* Detect if hart supports Smlwidlist */ > + __check_ext_csr(SBI_HART_PRIV_VER_UNKNOWN, > + CSR_MLWIDLIST, SBI_HART_EXT_SMLWIDLIST); > + /* Detect if hart supports Smwiddeleg */ > + __check_ext_csr(SBI_HART_PRIV_VER_UNKNOWN, > + CSR_MWIDDELEG, SBI_HART_EXT_SMWIDDELEG); > > #undef __check_ext_csr > > + /* > + * slwid traps on access when mwiddeleg=0 (reset state), so > + * Sswid presence is inferred from Smwiddeleg. > + */ > + if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMWIDDELEG)) { > + __sbi_hart_update_extension(hfeatures, > + SBI_HART_EXT_SSWID, true); > + } > + > #define __check_csr_existence(__csr, __csr_id) \ > csr_read_allowed(__csr, &trap); \ > if (!trap.cause) \ > -- > 2.43.7 > Reviewed-by: Pawandeep Oza <pawandeep.oza@oss.qualcomm.com>
diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h index ffe7666c..e0262bfc 100644 --- a/include/sbi/riscv_encoding.h +++ b/include/sbi/riscv_encoding.h @@ -400,6 +400,9 @@ /* Supervisor Resource Management Configuration CSRs */ #define CSR_SRMCFG 0x181 +/* Supervisor lower-privilege mode World ID CSR (Sswid) */ +#define CSR_SLWID 0x190 + /* Machine-Level Control transfer records CSRs */ #define CSR_MCTRCTL 0x34e @@ -520,6 +523,15 @@ #define CSR_MTINST 0x34a #define CSR_MTVAL2 0x34b +/* Machine World ID CSRs (Smwid, Smlwid, Smlwidlist, Smwiddeleg) */ +#define CSR_MLWID 0x390 +#define CSR_MWID 0x749 +#define CSR_MWIDDELEG 0x748 +#define CSR_MLWIDLIST 0x74A + +/* mwid lock bit */ +#define MWID_LOCK (_UL(1) << (__riscv_xlen - 1)) + /* Machine Memory Protection */ #define CSR_PMPCFG0 0x3a0 #define CSR_PMPCFG1 0x3a1 diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h index 543393bb..2941809e 100644 --- a/include/sbi/sbi_hart.h +++ b/include/sbi/sbi_hart.h @@ -95,6 +95,16 @@ enum sbi_hart_extensions { SBI_HART_EXT_F, /** Hart has D extension */ SBI_HART_EXT_D, + /** Hart has Smwid extension */ + SBI_HART_EXT_SMWID, + /** Hart has Smlwid extension */ + SBI_HART_EXT_SMLWID, + /** Hart has Smlwidlist extension */ + SBI_HART_EXT_SMLWIDLIST, + /** Hart has Smwiddeleg extension */ + SBI_HART_EXT_SMWIDDELEG, + /** Hart has Sswid extension */ + SBI_HART_EXT_SSWID, /** Maximum index of Hart extension */ SBI_HART_EXT_MAX, diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c index bee88557..f5f4062e 100644 --- a/lib/sbi/sbi_hart.c +++ b/lib/sbi/sbi_hart.c @@ -360,6 +360,11 @@ const struct sbi_hart_ext_data sbi_hart_ext[] = { __SBI_HART_EXT_DATA(v, SBI_HART_EXT_V), __SBI_HART_EXT_DATA(f, SBI_HART_EXT_F), __SBI_HART_EXT_DATA(d, SBI_HART_EXT_D), + __SBI_HART_EXT_DATA(smwid, SBI_HART_EXT_SMWID), + __SBI_HART_EXT_DATA(smlwid, SBI_HART_EXT_SMLWID), + __SBI_HART_EXT_DATA(smlwidlist, SBI_HART_EXT_SMLWIDLIST), + __SBI_HART_EXT_DATA(smwiddeleg, SBI_HART_EXT_SMWIDDELEG), + __SBI_HART_EXT_DATA(sswid, SBI_HART_EXT_SSWID), }; _Static_assert(SBI_HART_EXT_MAX == array_size(sbi_hart_ext), @@ -647,9 +652,30 @@ __pmp_skip: /* Detect if hart support sdtrig (debug triggers) */ __check_ext_csr(SBI_HART_PRIV_VER_UNKNOWN, CSR_TSELECT, SBI_HART_EXT_SDTRIG); + /* Detect if hart supports Smwid */ + __check_ext_csr(SBI_HART_PRIV_VER_UNKNOWN, + CSR_MWID, SBI_HART_EXT_SMWID); + /* Detect if hart supports Smlwid */ + __check_ext_csr(SBI_HART_PRIV_VER_UNKNOWN, + CSR_MLWID, SBI_HART_EXT_SMLWID); + /* Detect if hart supports Smlwidlist */ + __check_ext_csr(SBI_HART_PRIV_VER_UNKNOWN, + CSR_MLWIDLIST, SBI_HART_EXT_SMLWIDLIST); + /* Detect if hart supports Smwiddeleg */ + __check_ext_csr(SBI_HART_PRIV_VER_UNKNOWN, + CSR_MWIDDELEG, SBI_HART_EXT_SMWIDDELEG); #undef __check_ext_csr + /* + * slwid traps on access when mwiddeleg=0 (reset state), so + * Sswid presence is inferred from Smwiddeleg. + */ + if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMWIDDELEG)) { + __sbi_hart_update_extension(hfeatures, + SBI_HART_EXT_SSWID, true); + } + #define __check_csr_existence(__csr, __csr_id) \ csr_read_allowed(__csr, &trap); \ if (!trap.cause) \
Add CSR definitions for RISC-V Worlds (mwid, mlwid, mlwidlist, mwiddeleg, slwid) and detect Worlds extensions via CSR probes in hart_detect_features(). Signed-off-by: Yu-Chien Peter Lin <peter.lin@sifive.com> --- include/sbi/riscv_encoding.h | 12 ++++++++++++ include/sbi/sbi_hart.h | 10 ++++++++++ lib/sbi/sbi_hart.c | 26 ++++++++++++++++++++++++++ 3 files changed, 48 insertions(+)