@@ -54,6 +54,8 @@ do { \
#define SBI_TLB_INFO_SIZE sizeof(struct sbi_tlb_info)
+void __sbi_sfence_vma_all();
+
int sbi_tlb_request(ulong hmask, ulong hbase, struct sbi_tlb_info *tinfo);
int sbi_tlb_init(struct sbi_scratch *scratch, bool cold_boot);
@@ -12,6 +12,7 @@
#include <sbi/sbi_hfence.h>
#include <sbi/sbi_math.h>
#include <sbi/sbi_platform.h>
+#include <sbi/sbi_tlb.h>
#include <sbi/riscv_asm.h>
/*
@@ -74,7 +75,7 @@ static void sbi_hart_pmp_fence(void)
* conditions.
*/
if (misa_extension('S')) {
- __asm__ __volatile__("sfence.vma");
+ __sbi_sfence_vma_all();
/*
* If hypervisor mode is supported, flush caching
@@ -29,7 +29,7 @@ static unsigned long tlb_fifo_off;
static unsigned long tlb_fifo_mem_off;
static unsigned long tlb_range_flush_limit;
-static void tlb_flush_all(void)
+void __sbi_sfence_vma_all(void)
{
__asm__ __volatile("sfence.vma");
}
@@ -86,7 +86,7 @@ static void sbi_tlb_local_sfence_vma(struct sbi_tlb_info *tinfo)
sbi_pmu_ctr_incr_fw(SBI_PMU_FW_SFENCE_VMA_RCVD);
if ((start == 0 && size == 0) || (size == SBI_TLB_FLUSH_ALL)) {
- tlb_flush_all();
+ __sbi_sfence_vma_all();
return;
}