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26 May 2021 17:31:03 -0700 From: Atish Patra To: opensbi@lists.infradead.org Cc: Atish Patra , Anup Patel Subject: [PATCH v2 02/15] lib: sbi: Detect mcountinihibit support at runtime Date: Wed, 26 May 2021 17:30:31 -0700 Message-Id: <20210527003044.889681-3-atish.patra@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210527003044.889681-1-atish.patra@wdc.com> References: <20210527003044.889681-1-atish.patra@wdc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210526_173106_360401_F4428973 X-CRM114-Status: GOOD ( 11.62 ) X-Spam-Score: -2.5 (--) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: RISC-V ISA specification v1.11 defined mcountinhibit CSR that allows software to stop any counter from incrementing. The SBI PMU extension depends on this CSR support in hardware. Define mcountinhibit as a hart specific feature and detect it at runtime. Content analysis details: (-2.5 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [68.232.143.124 listed in list.dnswl.org] 0.0 SPF_NONE SPF: sender does not publish an SPF Record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: opensbi@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "opensbi" Errors-To: opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org RISC-V ISA specification v1.11 defined mcountinhibit CSR that allows software to stop any counter from incrementing. The SBI PMU extension depends on this CSR support in hardware. Define mcountinhibit as a hart specific feature and detect it at runtime. Reviewed-by: Anup Patel Signed-off-by: Atish Patra Reviewed-by: Xiang W --- include/sbi/sbi_hart.h | 4 +++- lib/sbi/sbi_hart.c | 11 +++++++++++ 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h index 031c7b08a815..9e317c52008c 100644 --- a/include/sbi/sbi_hart.h +++ b/include/sbi/sbi_hart.h @@ -18,8 +18,10 @@ enum sbi_hart_features { SBI_HART_HAS_SCOUNTEREN = (1 << 0), /** Hart has M-mode counter enable */ SBI_HART_HAS_MCOUNTEREN = (1 << 1), + /** Hart has counter inhibit CSR */ + SBI_HART_HAS_MCOUNTINHIBIT = (1 << 2), /** HART has timer csr implementation in hardware */ - SBI_HART_HAS_TIME = (1 << 2), + SBI_HART_HAS_TIME = (1 << 3), /** Last index of Hart features*/ SBI_HART_HAS_LAST_FEATURE = SBI_HART_HAS_TIME, diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c index de59b1431b5b..8fae20891bde 100644 --- a/lib/sbi/sbi_hart.c +++ b/lib/sbi/sbi_hart.c @@ -259,6 +259,9 @@ static inline char *sbi_hart_feature_id2string(unsigned long feature) case SBI_HART_HAS_MCOUNTEREN: fstr = "mcounteren"; break; + case SBI_HART_HAS_MCOUNTINHIBIT: + fstr = "mcountinhibit"; + break; case SBI_HART_HAS_TIME: fstr = "time"; break; @@ -421,6 +424,14 @@ __mhpm_skip: hfeatures->features |= SBI_HART_HAS_MCOUNTEREN; } + /* Detect if hart supports MCOUNTINHIBIT feature */ + val = csr_read_allowed(CSR_MCOUNTINHIBIT, (unsigned long)&trap); + if (!trap.cause) { + csr_write_allowed(CSR_MCOUNTINHIBIT, (unsigned long)&trap, val); + if (!trap.cause) + hfeatures->features |= SBI_HART_HAS_MCOUNTINHIBIT; + } + /* Detect if hart supports time CSR */ csr_read_allowed(CSR_TIME, (unsigned long)&trap); if (!trap.cause)