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[2/3] aspeed: Fixed FUC -> FUN typo in SCU.

Message ID 1475184427-144121-2-git-send-email-maxims@google.com
State Changes Requested, archived
Headers show

Commit Message

Maxim Sloyko Sept. 29, 2016, 9:27 p.m. UTC 
From: Maxim Sloyko <maxims@google.com>

Fixed FUC -> FUN typo in SCU.
---
 arch/arm/include/asm/arch-aspeed/regs-scu.h | 65 +++++++++++++++--------------
 arch/arm/mach-aspeed/ast-scu.c              |  2 +-
 2 files changed, 34 insertions(+), 33 deletions(-)

Comments

Maxim Sloyko Oct. 5, 2016, 4:17 p.m. UTC | #1 
Ping

On Thu, Sep 29, 2016 at 2:27 PM, <maxims@google.com> wrote:

> From: Maxim Sloyko <maxims@google.com>
>
> Fixed FUC -> FUN typo in SCU.
> ---
>  arch/arm/include/asm/arch-aspeed/regs-scu.h | 65
> +++++++++++++++--------------
>  arch/arm/mach-aspeed/ast-scu.c              |  2 +-
>  2 files changed, 34 insertions(+), 33 deletions(-)
>
> diff --git a/arch/arm/include/asm/arch-aspeed/regs-scu.h
> b/arch/arm/include/asm/arch-aspeed/regs-scu.h
> index b714fa9..aab032a 100644
> --- a/arch/arm/include/asm/arch-aspeed/regs-scu.h
> +++ b/arch/arm/include/asm/arch-aspeed/regs-scu.h
> @@ -830,49 +830,50 @@
>  /* AST_SCU_FUN_PIN_CTRL5               0x90 - Multi-function Pin
> Control#5 */
>  #define SCU_FUN_PIN_SPICS1             (0x1 << 31)
>  #define SCU_FUN_PIN_LPC_PLUS           (0x1 << 30)
> -#define SCU_FUC_PIN_USB20_HOST         (0x1 << 29)
> -#define SCU_FUC_PIN_USB11_PORT4                (0x1 << 28)
> -#define SCU_FUC_PIN_I2C14              (0x1 << 27)
> -#define SCU_FUC_PIN_I2C13              (0x1 << 26)
> -#define SCU_FUC_PIN_I2C12              (0x1 << 25)
> -#define SCU_FUC_PIN_I2C11              (0x1 << 24)
> -#define SCU_FUC_PIN_I2C10              (0x1 << 23)
> -#define SCU_FUC_PIN_I2C9               (0x1 << 22)
> -#define SCU_FUC_PIN_I2C8               (0x1 << 21)
> -#define SCU_FUC_PIN_I2C7               (0x1 << 20)
> -#define SCU_FUC_PIN_I2C6               (0x1 << 19)
> -#define SCU_FUC_PIN_I2C5               (0x1 << 18)
> -#define SCU_FUC_PIN_I2C4               (0x1 << 17)
> -#define SCU_FUC_PIN_I2C3               (0x1 << 16)
> -#define SCU_FUC_PIN_MII2_RX_DWN_DIS    (0x1 << 15)
> -#define SCU_FUC_PIN_MII2_TX_DWN_DIS    (0x1 << 14)
> -#define SCU_FUC_PIN_MII1_RX_DWN_DIS    (0x1 << 13)
> -#define SCU_FUC_PIN_MII1_TX_DWN_DIS    (0x1 << 12)
> -
> -#define SCU_FUC_PIN_MII2_TX_DRIV(x)    (x << 10)
> -#define SCU_FUC_PIN_MII2_TX_DRIV_MASK  (0x3 << 10)
> -#define SCU_FUC_PIN_MII1_TX_DRIV(x)    (x << 8)
> -#define SCU_FUC_PIN_MII1_TX_DRIV_MASK  (0x3 << 8)
> +#define SCU_FUN_PIN_USB20_HOST         (0x1 << 29)
> +#define SCU_FUN_PIN_USB11_PORT4                (0x1 << 28)
> +#define SCU_FUN_PIN_I2C14              (0x1 << 27)
> +#define SCU_FUN_PIN_I2C13              (0x1 << 26)
> +#define SCU_FUN_PIN_I2C12              (0x1 << 25)
> +#define SCU_FUN_PIN_I2C11              (0x1 << 24)
> +#define SCU_FUN_PIN_I2C10              (0x1 << 23)
> +#define SCU_FUN_PIN_I2C9               (0x1 << 22)
> +#define SCU_FUN_PIN_I2C8               (0x1 << 21)
> +#define SCU_FUN_PIN_I2C7               (0x1 << 20)
> +#define SCU_FUN_PIN_I2C6               (0x1 << 19)
> +#define SCU_FUN_PIN_I2C5               (0x1 << 18)
> +#define SCU_FUN_PIN_I2C4               (0x1 << 17)
> +#define SCU_FUN_PIN_I2C3               (0x1 << 16)
> +#define SCU_FUN_PIN_I2C(n)             (0x1 << (16 + (n) - 3))
> +#define SCU_FUN_PIN_MII2_RX_DWN_DIS    (0x1 << 15)
> +#define SCU_FUN_PIN_MII2_TX_DWN_DIS    (0x1 << 14)
> +#define SCU_FUN_PIN_MII1_RX_DWN_DIS    (0x1 << 13)
> +#define SCU_FUN_PIN_MII1_TX_DWN_DIS    (0x1 << 12)
> +
> +#define SCU_FUN_PIN_MII2_TX_DRIV(x)    (x << 10)
> +#define SCU_FUN_PIN_MII2_TX_DRIV_MASK  (0x3 << 10)
> +#define SCU_FUN_PIN_MII1_TX_DRIV(x)    (x << 8)
> +#define SCU_FUN_PIN_MII1_TX_DRIV_MASK  (0x3 << 8)
>
>  #define MII_NORMAL_DRIV                        0x0
>  #define MII_HIGH_DRIV                  0x2
>
> -#define SCU_FUC_PIN_UART6              (0x1 << 7)
> -#define SCU_FUC_PIN_ROM_16BIT          (0x1 << 6)
> -#define SCU_FUC_PIN_DIGI_V_OUT(x)      (x)
> -#define SCU_FUC_PIN_DIGI_V_OUT_MASK    (0x3)
> +#define SCU_FUN_PIN_UART6              (0x1 << 7)
> +#define SCU_FUN_PIN_ROM_16BIT          (0x1 << 6)
> +#define SCU_FUN_PIN_DIGI_V_OUT(x)      (x)
> +#define SCU_FUN_PIN_DIGI_V_OUT_MASK    (0x3)
>
>  #define VIDEO_DISABLE                  0x0
>  #define VIDEO_12BITS                   0x1
>  #define VIDEO_24BITS                   0x2
>  //#define VIDEO_DISABLE                        0x3
>
> -#define SCU_FUC_PIN_USB11_PORT2                (0x1 << 3)
> -#define SCU_FUC_PIN_SD1_8BIT           (0x1 << 3)
> +#define SCU_FUN_PIN_USB11_PORT2                (0x1 << 3)
> +#define SCU_FUN_PIN_SD1_8BIT           (0x1 << 3)
>
> -#define SCU_FUC_PIN_MAC1_MDIO          (0x1 << 2)
> -#define SCU_FUC_PIN_SD2                        (0x1 << 1)
> -#define SCU_FUC_PIN_SD1                        (0x1 << 0)
> +#define SCU_FUN_PIN_MAC1_MDIO          (0x1 << 2)
> +#define SCU_FUN_PIN_SD2                        (0x1 << 1)
> +#define SCU_FUN_PIN_SD1                        (0x1 << 0)
>
>
>  /* AST_SCU_FUN_PIN_CTRL6               0x94 - Multi-function Pin
> Control#6*/
> diff --git a/arch/arm/mach-aspeed/ast-scu.c b/arch/arm/mach-aspeed/ast-
> scu.c
> index 0cc0d67..280c421 100644
> --- a/arch/arm/mach-aspeed/ast-scu.c
> +++ b/arch/arm/mach-aspeed/ast-scu.c
> @@ -394,7 +394,7 @@ void ast_scu_multi_func_eth(u8 num)
>                               AST_SCU_FUN_PIN_CTRL1);
>
>                 ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL5) |
> -                             SCU_FUC_PIN_MAC1_MDIO,
> +                             SCU_FUN_PIN_MAC1_MDIO,
>                               AST_SCU_FUN_PIN_CTRL5);
>
>                 break;
> --
> 2.8.0.rc3.226.g39d4020
>
>
Joel Stanley Oct. 14, 2016, 12:07 a.m. UTC | #2 
On Fri, Sep 30, 2016 at 7:27 AM,  <maxims@google.com> wrote:
> From: Maxim Sloyko <maxims@google.com>
>
> Fixed FUC -> FUN typo in SCU.

This lacks a signed off by as previously discussed.

You have not made a convincing argument for this change. I suggest you
drop the patch from your series.

Cheers,

Joel

> ---
>  arch/arm/include/asm/arch-aspeed/regs-scu.h | 65 +++++++++++++++--------------
>  arch/arm/mach-aspeed/ast-scu.c              |  2 +-
>  2 files changed, 34 insertions(+), 33 deletions(-)
>
> diff --git a/arch/arm/include/asm/arch-aspeed/regs-scu.h b/arch/arm/include/asm/arch-aspeed/regs-scu.h
> index b714fa9..aab032a 100644
> --- a/arch/arm/include/asm/arch-aspeed/regs-scu.h
> +++ b/arch/arm/include/asm/arch-aspeed/regs-scu.h
> @@ -830,49 +830,50 @@
>  /* AST_SCU_FUN_PIN_CTRL5               0x90 - Multi-function Pin Control#5 */
>  #define SCU_FUN_PIN_SPICS1             (0x1 << 31)
>  #define SCU_FUN_PIN_LPC_PLUS           (0x1 << 30)
> -#define SCU_FUC_PIN_USB20_HOST         (0x1 << 29)
> -#define SCU_FUC_PIN_USB11_PORT4                (0x1 << 28)
> -#define SCU_FUC_PIN_I2C14              (0x1 << 27)
> -#define SCU_FUC_PIN_I2C13              (0x1 << 26)
> -#define SCU_FUC_PIN_I2C12              (0x1 << 25)
> -#define SCU_FUC_PIN_I2C11              (0x1 << 24)
> -#define SCU_FUC_PIN_I2C10              (0x1 << 23)
> -#define SCU_FUC_PIN_I2C9               (0x1 << 22)
> -#define SCU_FUC_PIN_I2C8               (0x1 << 21)
> -#define SCU_FUC_PIN_I2C7               (0x1 << 20)
> -#define SCU_FUC_PIN_I2C6               (0x1 << 19)
> -#define SCU_FUC_PIN_I2C5               (0x1 << 18)
> -#define SCU_FUC_PIN_I2C4               (0x1 << 17)
> -#define SCU_FUC_PIN_I2C3               (0x1 << 16)
> -#define SCU_FUC_PIN_MII2_RX_DWN_DIS    (0x1 << 15)
> -#define SCU_FUC_PIN_MII2_TX_DWN_DIS    (0x1 << 14)
> -#define SCU_FUC_PIN_MII1_RX_DWN_DIS    (0x1 << 13)
> -#define SCU_FUC_PIN_MII1_TX_DWN_DIS    (0x1 << 12)
> -
> -#define SCU_FUC_PIN_MII2_TX_DRIV(x)    (x << 10)
> -#define SCU_FUC_PIN_MII2_TX_DRIV_MASK  (0x3 << 10)
> -#define SCU_FUC_PIN_MII1_TX_DRIV(x)    (x << 8)
> -#define SCU_FUC_PIN_MII1_TX_DRIV_MASK  (0x3 << 8)
> +#define SCU_FUN_PIN_USB20_HOST         (0x1 << 29)
> +#define SCU_FUN_PIN_USB11_PORT4                (0x1 << 28)
> +#define SCU_FUN_PIN_I2C14              (0x1 << 27)
> +#define SCU_FUN_PIN_I2C13              (0x1 << 26)
> +#define SCU_FUN_PIN_I2C12              (0x1 << 25)
> +#define SCU_FUN_PIN_I2C11              (0x1 << 24)
> +#define SCU_FUN_PIN_I2C10              (0x1 << 23)
> +#define SCU_FUN_PIN_I2C9               (0x1 << 22)
> +#define SCU_FUN_PIN_I2C8               (0x1 << 21)
> +#define SCU_FUN_PIN_I2C7               (0x1 << 20)
> +#define SCU_FUN_PIN_I2C6               (0x1 << 19)
> +#define SCU_FUN_PIN_I2C5               (0x1 << 18)
> +#define SCU_FUN_PIN_I2C4               (0x1 << 17)
> +#define SCU_FUN_PIN_I2C3               (0x1 << 16)
> +#define SCU_FUN_PIN_I2C(n)             (0x1 << (16 + (n) - 3))
> +#define SCU_FUN_PIN_MII2_RX_DWN_DIS    (0x1 << 15)
> +#define SCU_FUN_PIN_MII2_TX_DWN_DIS    (0x1 << 14)
> +#define SCU_FUN_PIN_MII1_RX_DWN_DIS    (0x1 << 13)
> +#define SCU_FUN_PIN_MII1_TX_DWN_DIS    (0x1 << 12)
> +
> +#define SCU_FUN_PIN_MII2_TX_DRIV(x)    (x << 10)
> +#define SCU_FUN_PIN_MII2_TX_DRIV_MASK  (0x3 << 10)
> +#define SCU_FUN_PIN_MII1_TX_DRIV(x)    (x << 8)
> +#define SCU_FUN_PIN_MII1_TX_DRIV_MASK  (0x3 << 8)
>
>  #define MII_NORMAL_DRIV                        0x0
>  #define MII_HIGH_DRIV                  0x2
>
> -#define SCU_FUC_PIN_UART6              (0x1 << 7)
> -#define SCU_FUC_PIN_ROM_16BIT          (0x1 << 6)
> -#define SCU_FUC_PIN_DIGI_V_OUT(x)      (x)
> -#define SCU_FUC_PIN_DIGI_V_OUT_MASK    (0x3)
> +#define SCU_FUN_PIN_UART6              (0x1 << 7)
> +#define SCU_FUN_PIN_ROM_16BIT          (0x1 << 6)
> +#define SCU_FUN_PIN_DIGI_V_OUT(x)      (x)
> +#define SCU_FUN_PIN_DIGI_V_OUT_MASK    (0x3)
>
>  #define VIDEO_DISABLE                  0x0
>  #define VIDEO_12BITS                   0x1
>  #define VIDEO_24BITS                   0x2
>  //#define VIDEO_DISABLE                        0x3
>
> -#define SCU_FUC_PIN_USB11_PORT2                (0x1 << 3)
> -#define SCU_FUC_PIN_SD1_8BIT           (0x1 << 3)
> +#define SCU_FUN_PIN_USB11_PORT2                (0x1 << 3)
> +#define SCU_FUN_PIN_SD1_8BIT           (0x1 << 3)
>
> -#define SCU_FUC_PIN_MAC1_MDIO          (0x1 << 2)
> -#define SCU_FUC_PIN_SD2                        (0x1 << 1)
> -#define SCU_FUC_PIN_SD1                        (0x1 << 0)
> +#define SCU_FUN_PIN_MAC1_MDIO          (0x1 << 2)
> +#define SCU_FUN_PIN_SD2                        (0x1 << 1)
> +#define SCU_FUN_PIN_SD1                        (0x1 << 0)
>
>
>  /* AST_SCU_FUN_PIN_CTRL6               0x94 - Multi-function Pin Control#6*/
> diff --git a/arch/arm/mach-aspeed/ast-scu.c b/arch/arm/mach-aspeed/ast-scu.c
> index 0cc0d67..280c421 100644
> --- a/arch/arm/mach-aspeed/ast-scu.c
> +++ b/arch/arm/mach-aspeed/ast-scu.c
> @@ -394,7 +394,7 @@ void ast_scu_multi_func_eth(u8 num)
>                               AST_SCU_FUN_PIN_CTRL1);
>
>                 ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL5) |
> -                             SCU_FUC_PIN_MAC1_MDIO,
> +                             SCU_FUN_PIN_MAC1_MDIO,
>                               AST_SCU_FUN_PIN_CTRL5);
>
>                 break;
> --
> 2.8.0.rc3.226.g39d4020
>
> _______________________________________________
> openbmc mailing list
> openbmc@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/openbmc
Maxim Sloyko Oct. 17, 2016, 5:57 p.m. UTC | #3 
On Thu, Oct 13, 2016 at 5:07 PM, Joel Stanley <joel@jms.id.au> wrote:

> On Fri, Sep 30, 2016 at 7:27 AM,  <maxims@google.com> wrote:
> > From: Maxim Sloyko <maxims@google.com>
> >
> > Fixed FUC -> FUN typo in SCU.
>
> This lacks a signed off by as previously discussed.
>
> You have not made a convincing argument for this change. I suggest you
> drop the patch from your series.
>

Are you against this change per se or just against it being in this patch
series?


>
> Cheers,
>
> Joel
>
> > ---
> >  arch/arm/include/asm/arch-aspeed/regs-scu.h | 65
> +++++++++++++++--------------
> >  arch/arm/mach-aspeed/ast-scu.c              |  2 +-
> >  2 files changed, 34 insertions(+), 33 deletions(-)
> >
> > diff --git a/arch/arm/include/asm/arch-aspeed/regs-scu.h
> b/arch/arm/include/asm/arch-aspeed/regs-scu.h
> > index b714fa9..aab032a 100644
> > --- a/arch/arm/include/asm/arch-aspeed/regs-scu.h
> > +++ b/arch/arm/include/asm/arch-aspeed/regs-scu.h
> > @@ -830,49 +830,50 @@
> >  /* AST_SCU_FUN_PIN_CTRL5               0x90 - Multi-function Pin
> Control#5 */
> >  #define SCU_FUN_PIN_SPICS1             (0x1 << 31)
> >  #define SCU_FUN_PIN_LPC_PLUS           (0x1 << 30)
> > -#define SCU_FUC_PIN_USB20_HOST         (0x1 << 29)
> > -#define SCU_FUC_PIN_USB11_PORT4                (0x1 << 28)
> > -#define SCU_FUC_PIN_I2C14              (0x1 << 27)
> > -#define SCU_FUC_PIN_I2C13              (0x1 << 26)
> > -#define SCU_FUC_PIN_I2C12              (0x1 << 25)
> > -#define SCU_FUC_PIN_I2C11              (0x1 << 24)
> > -#define SCU_FUC_PIN_I2C10              (0x1 << 23)
> > -#define SCU_FUC_PIN_I2C9               (0x1 << 22)
> > -#define SCU_FUC_PIN_I2C8               (0x1 << 21)
> > -#define SCU_FUC_PIN_I2C7               (0x1 << 20)
> > -#define SCU_FUC_PIN_I2C6               (0x1 << 19)
> > -#define SCU_FUC_PIN_I2C5               (0x1 << 18)
> > -#define SCU_FUC_PIN_I2C4               (0x1 << 17)
> > -#define SCU_FUC_PIN_I2C3               (0x1 << 16)
> > -#define SCU_FUC_PIN_MII2_RX_DWN_DIS    (0x1 << 15)
> > -#define SCU_FUC_PIN_MII2_TX_DWN_DIS    (0x1 << 14)
> > -#define SCU_FUC_PIN_MII1_RX_DWN_DIS    (0x1 << 13)
> > -#define SCU_FUC_PIN_MII1_TX_DWN_DIS    (0x1 << 12)
> > -
> > -#define SCU_FUC_PIN_MII2_TX_DRIV(x)    (x << 10)
> > -#define SCU_FUC_PIN_MII2_TX_DRIV_MASK  (0x3 << 10)
> > -#define SCU_FUC_PIN_MII1_TX_DRIV(x)    (x << 8)
> > -#define SCU_FUC_PIN_MII1_TX_DRIV_MASK  (0x3 << 8)
> > +#define SCU_FUN_PIN_USB20_HOST         (0x1 << 29)
> > +#define SCU_FUN_PIN_USB11_PORT4                (0x1 << 28)
> > +#define SCU_FUN_PIN_I2C14              (0x1 << 27)
> > +#define SCU_FUN_PIN_I2C13              (0x1 << 26)
> > +#define SCU_FUN_PIN_I2C12              (0x1 << 25)
> > +#define SCU_FUN_PIN_I2C11              (0x1 << 24)
> > +#define SCU_FUN_PIN_I2C10              (0x1 << 23)
> > +#define SCU_FUN_PIN_I2C9               (0x1 << 22)
> > +#define SCU_FUN_PIN_I2C8               (0x1 << 21)
> > +#define SCU_FUN_PIN_I2C7               (0x1 << 20)
> > +#define SCU_FUN_PIN_I2C6               (0x1 << 19)
> > +#define SCU_FUN_PIN_I2C5               (0x1 << 18)
> > +#define SCU_FUN_PIN_I2C4               (0x1 << 17)
> > +#define SCU_FUN_PIN_I2C3               (0x1 << 16)
> > +#define SCU_FUN_PIN_I2C(n)             (0x1 << (16 + (n) - 3))
> > +#define SCU_FUN_PIN_MII2_RX_DWN_DIS    (0x1 << 15)
> > +#define SCU_FUN_PIN_MII2_TX_DWN_DIS    (0x1 << 14)
> > +#define SCU_FUN_PIN_MII1_RX_DWN_DIS    (0x1 << 13)
> > +#define SCU_FUN_PIN_MII1_TX_DWN_DIS    (0x1 << 12)
> > +
> > +#define SCU_FUN_PIN_MII2_TX_DRIV(x)    (x << 10)
> > +#define SCU_FUN_PIN_MII2_TX_DRIV_MASK  (0x3 << 10)
> > +#define SCU_FUN_PIN_MII1_TX_DRIV(x)    (x << 8)
> > +#define SCU_FUN_PIN_MII1_TX_DRIV_MASK  (0x3 << 8)
> >
> >  #define MII_NORMAL_DRIV                        0x0
> >  #define MII_HIGH_DRIV                  0x2
> >
> > -#define SCU_FUC_PIN_UART6              (0x1 << 7)
> > -#define SCU_FUC_PIN_ROM_16BIT          (0x1 << 6)
> > -#define SCU_FUC_PIN_DIGI_V_OUT(x)      (x)
> > -#define SCU_FUC_PIN_DIGI_V_OUT_MASK    (0x3)
> > +#define SCU_FUN_PIN_UART6              (0x1 << 7)
> > +#define SCU_FUN_PIN_ROM_16BIT          (0x1 << 6)
> > +#define SCU_FUN_PIN_DIGI_V_OUT(x)      (x)
> > +#define SCU_FUN_PIN_DIGI_V_OUT_MASK    (0x3)
> >
> >  #define VIDEO_DISABLE                  0x0
> >  #define VIDEO_12BITS                   0x1
> >  #define VIDEO_24BITS                   0x2
> >  //#define VIDEO_DISABLE                        0x3
> >
> > -#define SCU_FUC_PIN_USB11_PORT2                (0x1 << 3)
> > -#define SCU_FUC_PIN_SD1_8BIT           (0x1 << 3)
> > +#define SCU_FUN_PIN_USB11_PORT2                (0x1 << 3)
> > +#define SCU_FUN_PIN_SD1_8BIT           (0x1 << 3)
> >
> > -#define SCU_FUC_PIN_MAC1_MDIO          (0x1 << 2)
> > -#define SCU_FUC_PIN_SD2                        (0x1 << 1)
> > -#define SCU_FUC_PIN_SD1                        (0x1 << 0)
> > +#define SCU_FUN_PIN_MAC1_MDIO          (0x1 << 2)
> > +#define SCU_FUN_PIN_SD2                        (0x1 << 1)
> > +#define SCU_FUN_PIN_SD1                        (0x1 << 0)
> >
> >
> >  /* AST_SCU_FUN_PIN_CTRL6               0x94 - Multi-function Pin
> Control#6*/
> > diff --git a/arch/arm/mach-aspeed/ast-scu.c b/arch/arm/mach-aspeed/ast-
> scu.c
> > index 0cc0d67..280c421 100644
> > --- a/arch/arm/mach-aspeed/ast-scu.c
> > +++ b/arch/arm/mach-aspeed/ast-scu.c
> > @@ -394,7 +394,7 @@ void ast_scu_multi_func_eth(u8 num)
> >                               AST_SCU_FUN_PIN_CTRL1);
> >
> >                 ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL5) |
> > -                             SCU_FUC_PIN_MAC1_MDIO,
> > +                             SCU_FUN_PIN_MAC1_MDIO,
> >                               AST_SCU_FUN_PIN_CTRL5);
> >
> >                 break;
> > --
> > 2.8.0.rc3.226.g39d4020
> >
> > _______________________________________________
> > openbmc mailing list
> > openbmc@lists.ozlabs.org
> > https://lists.ozlabs.org/listinfo/openbmc
>
Joel Stanley Oct. 18, 2016, 6:36 a.m. UTC | #4 
On Tue, Oct 18, 2016 at 4:27 AM, Maxim Sloyko <maxims@google.com> wrote:
>
>
> On Thu, Oct 13, 2016 at 5:07 PM, Joel Stanley <joel@jms.id.au> wrote:
>>
>> On Fri, Sep 30, 2016 at 7:27 AM,  <maxims@google.com> wrote:
>> > From: Maxim Sloyko <maxims@google.com>
>> >
>> > Fixed FUC -> FUN typo in SCU.
>>
>> This lacks a signed off by as previously discussed.
>>
>> You have not made a convincing argument for this change. I suggest you
>> drop the patch from your series.
>
>
> Are you against this change per se or just against it being in this patch
> series?

In our tree at the moment.

We're happy to take drivers that are on their way to being upstream,
or fixes for bugs that we're hitting.

Other than that our goal should be cleaning up the tree so we can
submit it upstream. Once we submit upstream everyone has a common base
to work from, which makes doing cleanups easier.

Cheers,

Joel
Maxim Sloyko Oct. 27, 2016, 6:52 p.m. UTC | #5 
Hi Joel,

Sorry for long delay, I got distracted by other projects that needed
immediate attention. I'll be sending new and updated patches soon.

On Mon, Oct 17, 2016 at 11:36 PM, Joel Stanley <joel@jms.id.au> wrote:

> On Tue, Oct 18, 2016 at 4:27 AM, Maxim Sloyko <maxims@google.com> wrote:
> >
> >
> > On Thu, Oct 13, 2016 at 5:07 PM, Joel Stanley <joel@jms.id.au> wrote:
> >>
> >> On Fri, Sep 30, 2016 at 7:27 AM,  <maxims@google.com> wrote:
> >> > From: Maxim Sloyko <maxims@google.com>
> >> >
> >> > Fixed FUC -> FUN typo in SCU.
> >>
> >> This lacks a signed off by as previously discussed.
> >>
> >> You have not made a convincing argument for this change. I suggest you
> >> drop the patch from your series.
> >
> >
> > Are you against this change per se or just against it being in this patch
> > series?
>
> In our tree at the moment.
>
> We're happy to take drivers that are on their way to being upstream,
> or fixes for bugs that we're hitting.
>
> Other than that our goal should be cleaning up the tree so we can
> submit it upstream. Once we submit upstream everyone has a common base
> to work from, which makes doing cleanups easier.
>

I still don't get it. Is this not a cleanup? I think having consistent
naming is important. It would be understandable if this file was already in
upstream tree and I would be touching parts that are in upstream version
and parts that aren't, but
this file only exists in our tree.

What is the downside?


>
> Cheers,
>
> Joel
>
diff mbox

Patch

diff --git a/arch/arm/include/asm/arch-aspeed/regs-scu.h b/arch/arm/include/asm/arch-aspeed/regs-scu.h
index b714fa9..aab032a 100644
--- a/arch/arm/include/asm/arch-aspeed/regs-scu.h
+++ b/arch/arm/include/asm/arch-aspeed/regs-scu.h
@@ -830,49 +830,50 @@ 
 /* AST_SCU_FUN_PIN_CTRL5		0x90 - Multi-function Pin Control#5 */
 #define SCU_FUN_PIN_SPICS1		(0x1 << 31)
 #define SCU_FUN_PIN_LPC_PLUS		(0x1 << 30)
-#define SCU_FUC_PIN_USB20_HOST		(0x1 << 29)
-#define SCU_FUC_PIN_USB11_PORT4		(0x1 << 28)
-#define SCU_FUC_PIN_I2C14		(0x1 << 27)
-#define SCU_FUC_PIN_I2C13		(0x1 << 26)
-#define SCU_FUC_PIN_I2C12		(0x1 << 25)
-#define SCU_FUC_PIN_I2C11		(0x1 << 24)
-#define SCU_FUC_PIN_I2C10		(0x1 << 23)
-#define SCU_FUC_PIN_I2C9		(0x1 << 22)
-#define SCU_FUC_PIN_I2C8		(0x1 << 21)
-#define SCU_FUC_PIN_I2C7		(0x1 << 20)
-#define SCU_FUC_PIN_I2C6		(0x1 << 19)
-#define SCU_FUC_PIN_I2C5		(0x1 << 18)
-#define SCU_FUC_PIN_I2C4		(0x1 << 17)
-#define SCU_FUC_PIN_I2C3		(0x1 << 16)
-#define SCU_FUC_PIN_MII2_RX_DWN_DIS	(0x1 << 15)
-#define SCU_FUC_PIN_MII2_TX_DWN_DIS	(0x1 << 14)
-#define SCU_FUC_PIN_MII1_RX_DWN_DIS	(0x1 << 13)
-#define SCU_FUC_PIN_MII1_TX_DWN_DIS	(0x1 << 12)
-
-#define SCU_FUC_PIN_MII2_TX_DRIV(x)	(x << 10)
-#define SCU_FUC_PIN_MII2_TX_DRIV_MASK	(0x3 << 10)
-#define SCU_FUC_PIN_MII1_TX_DRIV(x)	(x << 8)
-#define SCU_FUC_PIN_MII1_TX_DRIV_MASK	(0x3 << 8)
+#define SCU_FUN_PIN_USB20_HOST		(0x1 << 29)
+#define SCU_FUN_PIN_USB11_PORT4		(0x1 << 28)
+#define SCU_FUN_PIN_I2C14		(0x1 << 27)
+#define SCU_FUN_PIN_I2C13		(0x1 << 26)
+#define SCU_FUN_PIN_I2C12		(0x1 << 25)
+#define SCU_FUN_PIN_I2C11		(0x1 << 24)
+#define SCU_FUN_PIN_I2C10		(0x1 << 23)
+#define SCU_FUN_PIN_I2C9		(0x1 << 22)
+#define SCU_FUN_PIN_I2C8		(0x1 << 21)
+#define SCU_FUN_PIN_I2C7		(0x1 << 20)
+#define SCU_FUN_PIN_I2C6		(0x1 << 19)
+#define SCU_FUN_PIN_I2C5		(0x1 << 18)
+#define SCU_FUN_PIN_I2C4		(0x1 << 17)
+#define SCU_FUN_PIN_I2C3		(0x1 << 16)
+#define SCU_FUN_PIN_I2C(n)		(0x1 << (16 + (n) - 3))
+#define SCU_FUN_PIN_MII2_RX_DWN_DIS	(0x1 << 15)
+#define SCU_FUN_PIN_MII2_TX_DWN_DIS	(0x1 << 14)
+#define SCU_FUN_PIN_MII1_RX_DWN_DIS	(0x1 << 13)
+#define SCU_FUN_PIN_MII1_TX_DWN_DIS	(0x1 << 12)
+
+#define SCU_FUN_PIN_MII2_TX_DRIV(x)	(x << 10)
+#define SCU_FUN_PIN_MII2_TX_DRIV_MASK	(0x3 << 10)
+#define SCU_FUN_PIN_MII1_TX_DRIV(x)	(x << 8)
+#define SCU_FUN_PIN_MII1_TX_DRIV_MASK	(0x3 << 8)
 
 #define MII_NORMAL_DRIV			0x0
 #define MII_HIGH_DRIV			0x2
 
-#define SCU_FUC_PIN_UART6		(0x1 << 7)
-#define SCU_FUC_PIN_ROM_16BIT		(0x1 << 6)
-#define SCU_FUC_PIN_DIGI_V_OUT(x)	(x)
-#define SCU_FUC_PIN_DIGI_V_OUT_MASK	(0x3)
+#define SCU_FUN_PIN_UART6		(0x1 << 7)
+#define SCU_FUN_PIN_ROM_16BIT		(0x1 << 6)
+#define SCU_FUN_PIN_DIGI_V_OUT(x)	(x)
+#define SCU_FUN_PIN_DIGI_V_OUT_MASK	(0x3)
 
 #define VIDEO_DISABLE			0x0
 #define VIDEO_12BITS			0x1
 #define VIDEO_24BITS			0x2
 //#define VIDEO_DISABLE			0x3
 
-#define SCU_FUC_PIN_USB11_PORT2		(0x1 << 3)
-#define SCU_FUC_PIN_SD1_8BIT		(0x1 << 3)
+#define SCU_FUN_PIN_USB11_PORT2		(0x1 << 3)
+#define SCU_FUN_PIN_SD1_8BIT		(0x1 << 3)
 
-#define SCU_FUC_PIN_MAC1_MDIO		(0x1 << 2)
-#define SCU_FUC_PIN_SD2			(0x1 << 1)
-#define SCU_FUC_PIN_SD1			(0x1 << 0)
+#define SCU_FUN_PIN_MAC1_MDIO		(0x1 << 2)
+#define SCU_FUN_PIN_SD2			(0x1 << 1)
+#define SCU_FUN_PIN_SD1			(0x1 << 0)
 
 
 /* AST_SCU_FUN_PIN_CTRL6		0x94 - Multi-function Pin Control#6*/
diff --git a/arch/arm/mach-aspeed/ast-scu.c b/arch/arm/mach-aspeed/ast-scu.c
index 0cc0d67..280c421 100644
--- a/arch/arm/mach-aspeed/ast-scu.c
+++ b/arch/arm/mach-aspeed/ast-scu.c
@@ -394,7 +394,7 @@  void ast_scu_multi_func_eth(u8 num)
 			      AST_SCU_FUN_PIN_CTRL1);
 
 		ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL5) |
-			      SCU_FUC_PIN_MAC1_MDIO,
+			      SCU_FUN_PIN_MAC1_MDIO,
 			      AST_SCU_FUN_PIN_CTRL5);
 
 		break;