diff mbox series

[net] r8169: fix performance regression related to PCIe max read request size

Message ID 342eb05f-0376-cb0f-5fea-cb1f171b4fdb@gmail.com
State Accepted
Delegated to: David Miller
Headers show
Series [net] r8169: fix performance regression related to PCIe max read request size | expand

Commit Message

Heiner Kallweit Feb. 5, 2020, 8:22 p.m. UTC
It turned out that on low performance systems the original change can
cause lower tx performance. On a N3450-based mini-PC tx performance
in iperf3 was reduced from 950Mbps to ~900Mbps. Therefore effectively
revert the original change, just use pcie_set_readrq() now instead of
changing the PCIe capability register directly.

Fixes: 2df49d365498 ("r8169: remove fiddling with the PCIe max read request size")
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
---
 drivers/net/ethernet/realtek/r8169_main.c | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

David Miller Feb. 6, 2020, 1:20 p.m. UTC | #1
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Wed, 5 Feb 2020 21:22:46 +0100

> It turned out that on low performance systems the original change can
> cause lower tx performance. On a N3450-based mini-PC tx performance
> in iperf3 was reduced from 950Mbps to ~900Mbps. Therefore effectively
> revert the original change, just use pcie_set_readrq() now instead of
> changing the PCIe capability register directly.
> 
> Fixes: 2df49d365498 ("r8169: remove fiddling with the PCIe max read request size")
> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

Applied and queued up for v5.5 -stable, thanks.
diff mbox series

Patch

diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c
index aaa316be6..a2168a147 100644
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -2477,15 +2477,18 @@  static void rtl_hw_jumbo_enable(struct rtl8169_private *tp)
 	switch (tp->mac_version) {
 	case RTL_GIGA_MAC_VER_12:
 	case RTL_GIGA_MAC_VER_17:
+		pcie_set_readrq(tp->pci_dev, 512);
 		r8168b_1_hw_jumbo_enable(tp);
 		break;
 	case RTL_GIGA_MAC_VER_18 ... RTL_GIGA_MAC_VER_26:
+		pcie_set_readrq(tp->pci_dev, 512);
 		r8168c_hw_jumbo_enable(tp);
 		break;
 	case RTL_GIGA_MAC_VER_27 ... RTL_GIGA_MAC_VER_28:
 		r8168dp_hw_jumbo_enable(tp);
 		break;
 	case RTL_GIGA_MAC_VER_31 ... RTL_GIGA_MAC_VER_33:
+		pcie_set_readrq(tp->pci_dev, 512);
 		r8168e_hw_jumbo_enable(tp);
 		break;
 	default:
@@ -2515,6 +2518,9 @@  static void rtl_hw_jumbo_disable(struct rtl8169_private *tp)
 		break;
 	}
 	rtl_lock_config_regs(tp);
+
+	if (pci_is_pcie(tp->pci_dev) && tp->supports_gmii)
+		pcie_set_readrq(tp->pci_dev, 4096);
 }
 
 static void rtl_jumbo_config(struct rtl8169_private *tp, int mtu)