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[net-next,06/11] net: dsa: seville: reindent defines for MDIO controller

Message ID 20200918105753.3473725-7-olteanv@gmail.com
State Accepted
Delegated to: David Miller
Headers show
Series Felix DSA driver cleanup: build Seville separately | expand

Commit Message

Vladimir Oltean Sept. 18, 2020, 10:57 a.m. UTC 
From: Vladimir Oltean <vladimir.oltean@nxp.com>

Reindent these definitions to be in line with the rest of the driver.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
---
 drivers/net/dsa/ocelot/seville_vsc9953.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)
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Patch

diff --git a/drivers/net/dsa/ocelot/seville_vsc9953.c b/drivers/net/dsa/ocelot/seville_vsc9953.c
index 0b6ceec85891..224f7326ddb6 100644
--- a/drivers/net/dsa/ocelot/seville_vsc9953.c
+++ b/drivers/net/dsa/ocelot/seville_vsc9953.c
@@ -16,12 +16,12 @@ 
 #define VSC9953_VCAP_IS2_ENTRY_WIDTH		376
 #define VSC9953_VCAP_PORT_CNT			10
 
-#define		MSCC_MIIM_CMD_OPR_WRITE		BIT(1)
-#define		MSCC_MIIM_CMD_OPR_READ		BIT(2)
-#define		MSCC_MIIM_CMD_WRDATA_SHIFT	4
-#define		MSCC_MIIM_CMD_REGAD_SHIFT	20
-#define		MSCC_MIIM_CMD_PHYAD_SHIFT	25
-#define		MSCC_MIIM_CMD_VLD		BIT(31)
+#define MSCC_MIIM_CMD_OPR_WRITE			BIT(1)
+#define MSCC_MIIM_CMD_OPR_READ			BIT(2)
+#define MSCC_MIIM_CMD_WRDATA_SHIFT		4
+#define MSCC_MIIM_CMD_REGAD_SHIFT		20
+#define MSCC_MIIM_CMD_PHYAD_SHIFT		25
+#define MSCC_MIIM_CMD_VLD			BIT(31)
 
 static const u32 vsc9953_ana_regmap[] = {
 	REG(ANA_ADVLEARN,			0x00b500),