| Message ID | 20200918105753.3473725-6-olteanv@gmail.com |
|---|---|
| State | Accepted |
| Delegated to: | David Miller |
| Headers | show |
| Series | Felix DSA driver cleanup: build Seville separately | expand |
On 18/09/2020 13:57:47+0300, Vladimir Oltean wrote: > From: Vladimir Oltean <vladimir.oltean@nxp.com> > > Some definitions were likely copied from > drivers/net/mdio/mdio-mscc-miim.c. > > They are not necessary, remove them. Seeing that the mdio controller is probably the same, couldn't mdio-mscc-miim be reused? > > Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> > --- > drivers/net/dsa/ocelot/seville_vsc9953.c | 11 ----------- > 1 file changed, 11 deletions(-) > > diff --git a/drivers/net/dsa/ocelot/seville_vsc9953.c b/drivers/net/dsa/ocelot/seville_vsc9953.c > index dfc9a1b2a504..0b6ceec85891 100644 > --- a/drivers/net/dsa/ocelot/seville_vsc9953.c > +++ b/drivers/net/dsa/ocelot/seville_vsc9953.c > @@ -16,23 +16,12 @@ > #define VSC9953_VCAP_IS2_ENTRY_WIDTH 376 > #define VSC9953_VCAP_PORT_CNT 10 > > -#define MSCC_MIIM_REG_STATUS 0x0 > -#define MSCC_MIIM_STATUS_STAT_BUSY BIT(3) > -#define MSCC_MIIM_REG_CMD 0x8 > #define MSCC_MIIM_CMD_OPR_WRITE BIT(1) > #define MSCC_MIIM_CMD_OPR_READ BIT(2) > #define MSCC_MIIM_CMD_WRDATA_SHIFT 4 > #define MSCC_MIIM_CMD_REGAD_SHIFT 20 > #define MSCC_MIIM_CMD_PHYAD_SHIFT 25 > #define MSCC_MIIM_CMD_VLD BIT(31) > -#define MSCC_MIIM_REG_DATA 0xC > -#define MSCC_MIIM_DATA_ERROR (BIT(16) | BIT(17)) > - > -#define MSCC_PHY_REG_PHY_CFG 0x0 > -#define PHY_CFG_PHY_ENA (BIT(0) | BIT(1) | BIT(2) | BIT(3)) > -#define PHY_CFG_PHY_COMMON_RESET BIT(4) > -#define PHY_CFG_PHY_RESET (BIT(5) | BIT(6) | BIT(7) | BIT(8)) > -#define MSCC_PHY_REG_PHY_STATUS 0x4 > > static const u32 vsc9953_ana_regmap[] = { > REG(ANA_ADVLEARN, 0x00b500), > -- > 2.25.1 >
On Fri, Sep 18, 2020 at 05:46:45PM +0200, Alexandre Belloni wrote: > On 18/09/2020 13:57:47+0300, Vladimir Oltean wrote: > > From: Vladimir Oltean <vladimir.oltean@nxp.com> > > > > Some definitions were likely copied from > > drivers/net/mdio/mdio-mscc-miim.c. > > > > They are not necessary, remove them. > > Seeing that the mdio controller is probably the same, couldn't > mdio-mscc-miim be reused? Yeah, it probably can, but for 75 lines of code, is it worth it to butcher mdio-mscc-miim too? I'm not sure at what level that reuse should be. Should we pass it our regmap? mdio-mscc-miim doesn't use regmap.
On 18/09/2020 18:54:42+0300, Vladimir Oltean wrote: > On Fri, Sep 18, 2020 at 05:46:45PM +0200, Alexandre Belloni wrote: > > On 18/09/2020 13:57:47+0300, Vladimir Oltean wrote: > > > From: Vladimir Oltean <vladimir.oltean@nxp.com> > > > > > > Some definitions were likely copied from > > > drivers/net/mdio/mdio-mscc-miim.c. > > > > > > They are not necessary, remove them. > > > > Seeing that the mdio controller is probably the same, couldn't > > mdio-mscc-miim be reused? > > Yeah, it probably can, but for 75 lines of code, is it worth it to > butcher mdio-mscc-miim too? I'm not sure at what level that reuse should > be. Should we pass it our regmap? mdio-mscc-miim doesn't use regmap. It may be worth it, I'm going to add DSA support for ocelot over SPI. So to abstract the bus, it is probably worth moving to regmap.
On Fri, Sep 18, 2020 at 07:37:19PM +0200, Alexandre Belloni wrote: > On 18/09/2020 18:54:42+0300, Vladimir Oltean wrote: > > On Fri, Sep 18, 2020 at 05:46:45PM +0200, Alexandre Belloni wrote: > > > On 18/09/2020 13:57:47+0300, Vladimir Oltean wrote: > > > > From: Vladimir Oltean <vladimir.oltean@nxp.com> > > > > > > > > Some definitions were likely copied from > > > > drivers/net/mdio/mdio-mscc-miim.c. > > > > > > > > They are not necessary, remove them. > > > > > > Seeing that the mdio controller is probably the same, couldn't > > > mdio-mscc-miim be reused? > > > > Yeah, it probably can, but for 75 lines of code, is it worth it to > > butcher mdio-mscc-miim too? I'm not sure at what level that reuse should > > be. Should we pass it our regmap? mdio-mscc-miim doesn't use regmap. > > It may be worth it, I'm going to add DSA support for ocelot over SPI. So > to abstract the bus, it is probably worth moving to regmap. Wow, that's interesting, tell me more. For traffic, will you be using an NPI port, or some other configuration? And as for reusing mdio-mscc-miim, I think I'll look into that as a separate set of patches. Thanks, -Vladimir
On 18/09/2020 21:59:50+0300, Vladimir Oltean wrote: > On Fri, Sep 18, 2020 at 07:37:19PM +0200, Alexandre Belloni wrote: > > On 18/09/2020 18:54:42+0300, Vladimir Oltean wrote: > > > On Fri, Sep 18, 2020 at 05:46:45PM +0200, Alexandre Belloni wrote: > > > > On 18/09/2020 13:57:47+0300, Vladimir Oltean wrote: > > > > > From: Vladimir Oltean <vladimir.oltean@nxp.com> > > > > > > > > > > Some definitions were likely copied from > > > > > drivers/net/mdio/mdio-mscc-miim.c. > > > > > > > > > > They are not necessary, remove them. > > > > > > > > Seeing that the mdio controller is probably the same, couldn't > > > > mdio-mscc-miim be reused? > > > > > > Yeah, it probably can, but for 75 lines of code, is it worth it to > > > butcher mdio-mscc-miim too? I'm not sure at what level that reuse should > > > be. Should we pass it our regmap? mdio-mscc-miim doesn't use regmap. > > > > It may be worth it, I'm going to add DSA support for ocelot over SPI. So > > to abstract the bus, it is probably worth moving to regmap. > > Wow, that's interesting, tell me more. For traffic, will you be using > an NPI port, or some other configuration? > Yes, the plan is to use SPI for configuration and an NPI port for traffic. The internal MIPS CPU will be disabled. If I'm not mistaken, this is what is done for vsc73xx. > And as for reusing mdio-mscc-miim, I think I'll look into that as a > separate set of patches. > No worries, I can also take care of that. Or maybe you are right and it doesn't make sense to do it.
diff --git a/drivers/net/dsa/ocelot/seville_vsc9953.c b/drivers/net/dsa/ocelot/seville_vsc9953.c index dfc9a1b2a504..0b6ceec85891 100644 --- a/drivers/net/dsa/ocelot/seville_vsc9953.c +++ b/drivers/net/dsa/ocelot/seville_vsc9953.c @@ -16,23 +16,12 @@ #define VSC9953_VCAP_IS2_ENTRY_WIDTH 376 #define VSC9953_VCAP_PORT_CNT 10 -#define MSCC_MIIM_REG_STATUS 0x0 -#define MSCC_MIIM_STATUS_STAT_BUSY BIT(3) -#define MSCC_MIIM_REG_CMD 0x8 #define MSCC_MIIM_CMD_OPR_WRITE BIT(1) #define MSCC_MIIM_CMD_OPR_READ BIT(2) #define MSCC_MIIM_CMD_WRDATA_SHIFT 4 #define MSCC_MIIM_CMD_REGAD_SHIFT 20 #define MSCC_MIIM_CMD_PHYAD_SHIFT 25 #define MSCC_MIIM_CMD_VLD BIT(31) -#define MSCC_MIIM_REG_DATA 0xC -#define MSCC_MIIM_DATA_ERROR (BIT(16) | BIT(17)) - -#define MSCC_PHY_REG_PHY_CFG 0x0 -#define PHY_CFG_PHY_ENA (BIT(0) | BIT(1) | BIT(2) | BIT(3)) -#define PHY_CFG_PHY_COMMON_RESET BIT(4) -#define PHY_CFG_PHY_RESET (BIT(5) | BIT(6) | BIT(7) | BIT(8)) -#define MSCC_PHY_REG_PHY_STATUS 0x4 static const u32 vsc9953_ana_regmap[] = { REG(ANA_ADVLEARN, 0x00b500),