| Message ID | 20200722172422.2590489-4-olteanv@gmail.com |
|---|---|
| State | Not Applicable |
| Delegated to: | David Miller |
| Headers | show |
| Series | Add Seville Ethernet switch to T1040RDB | expand |
> -----Original Message----- > From: Vladimir Oltean <olteanv@gmail.com> > Sent: Wednesday, July 22, 2020 8:24 PM > To: robh+dt@kernel.org; shawnguo@kernel.org; mpe@ellerman.id.au; > devicetree@vger.kernel.org > Cc: benh@kernel.crashing.org; paulus@samba.org; linuxppc- > dev@lists.ozlabs.org; linux-kernel@vger.kernel.org; > netdev@vger.kernel.org; Madalin Bucur (OSS) <madalin.bucur@oss.nxp.com>; > Radu-andrei Bulie <radu-andrei.bulie@nxp.com>; fido_max@inbox.ru > Subject: [PATCH devicetree 3/4] powerpc: dts: t1040rdb: put SGMII PHY > under &mdio0 label > > We're going to add 8 more PHYs in a future patch. It is easier to follow > the hardware description if we don't need to fish for the path of the > MDIO controllers inside the SoC and just use the labels. > Please align to the existing structure, it may be easier to add something without paying attention to that but it's better to keep things organized. This structure is used across all the device trees of the platforms using DPAA, let's not start diverging now. > Signed-off-by: Vladimir Oltean <olteanv@gmail.com> > --- > arch/powerpc/boot/dts/fsl/t1040rdb.dts | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/arch/powerpc/boot/dts/fsl/t1040rdb.dts > b/arch/powerpc/boot/dts/fsl/t1040rdb.dts > index 65ff34c49025..40d7126dbe90 100644 > --- a/arch/powerpc/boot/dts/fsl/t1040rdb.dts > +++ b/arch/powerpc/boot/dts/fsl/t1040rdb.dts > @@ -59,12 +59,6 @@ ethernet@e4000 { > phy-handle = <&phy_sgmii_2>; > phy-connection-type = "sgmii"; > }; > - > - mdio@fc000 { > - phy_sgmii_2: ethernet-phy@3 { > - reg = <0x03>; > - }; > - }; > }; > }; > > @@ -76,3 +70,9 @@ cpld@3,0 { > }; > > #include "t1040si-post.dtsi" > + > +&mdio0 { > + phy_sgmii_2: ethernet-phy@3 { > + reg = <0x3>; > + }; > +}; > -- > 2.25.1
diff --git a/arch/powerpc/boot/dts/fsl/t1040rdb.dts b/arch/powerpc/boot/dts/fsl/t1040rdb.dts index 65ff34c49025..40d7126dbe90 100644 --- a/arch/powerpc/boot/dts/fsl/t1040rdb.dts +++ b/arch/powerpc/boot/dts/fsl/t1040rdb.dts @@ -59,12 +59,6 @@ ethernet@e4000 { phy-handle = <&phy_sgmii_2>; phy-connection-type = "sgmii"; }; - - mdio@fc000 { - phy_sgmii_2: ethernet-phy@3 { - reg = <0x03>; - }; - }; }; }; @@ -76,3 +70,9 @@ cpld@3,0 { }; #include "t1040si-post.dtsi" + +&mdio0 { + phy_sgmii_2: ethernet-phy@3 { + reg = <0x3>; + }; +};
We're going to add 8 more PHYs in a future patch. It is easier to follow the hardware description if we don't need to fish for the path of the MDIO controllers inside the SoC and just use the labels. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> --- arch/powerpc/boot/dts/fsl/t1040rdb.dts | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)