From patchwork Fri Oct 19 13:37:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil Kovvuri X-Patchwork-Id: 986785 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="LoxVwLuy"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 42c6S325D3z9sBn for ; Sat, 20 Oct 2018 00:38:11 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727594AbeJSVoT (ORCPT ); Fri, 19 Oct 2018 17:44:19 -0400 Received: from mail-pl1-f194.google.com ([209.85.214.194]:41828 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727382AbeJSVoT (ORCPT ); Fri, 19 Oct 2018 17:44:19 -0400 Received: by mail-pl1-f194.google.com with SMTP id p5-v6so971173plq.8; Fri, 19 Oct 2018 06:38:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=qKDWg33av3B0fJTc4W1oaLPUCI8mIImMyATjXYFq4vY=; b=LoxVwLuyBIKrnYq4+hfGGMJjYigOBkrD5ri6FNPvbuCeb6nB5JEmNhbxrqkjp1cBpy TgYE64Sx65cBIAIdwWO+ILf4r+I2M2gPTc5L9HigH72Kc9wE8VdlGWFxBAb40qC67xkf iLDA1M9X1uwCklYX2mfcVtWNOY+VLmA5LFAxfX+/v1CTGvw5ag4V7StfKTN//aCwgb69 9VrWj6kWW/yfQ9JRIVrkjZ7lcseT9LlrisZgE0/JIou6W7w9NnVYvXF99GN+1vb9FtHM aHAPSI90jdd6M7ZcF4yD3QllYQBQTIMJ3mIPfh3Uigwga7/zWidj0+uUzoIi4uVIrrE0 6ByA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=qKDWg33av3B0fJTc4W1oaLPUCI8mIImMyATjXYFq4vY=; b=Dd5YbdtpHzulQvzswgUXTIQ10pxELlEIfhHvV/seiyVEauRRtqIm6K5vWsvjuuPSDm j8HMIOnYxthXpLaixwSSFAfGvpw2BtTFaf2fS1U9O7oH0ZKvAxS1/7LTUe8DzbZWi0Mi nQm6ga9aIcRd7vg8PUmVcMcpmBYnJm+nmu6pJhqiLnBiFwUI7LNFxubuQX/H0q2JYZcR FuK/ok20VzBoibJDTsJtfQIGgM06FfjzSi5qQNxZ34b2zLMRmap23fw1RK8fuRplAw5u xMCC7pMCTwdHMGofmFsGDGqvA+EgLaNFSjX5NA67WIpQvSR6fbgnCAFVk2cIA9oG3URd kzYg== X-Gm-Message-State: ABuFfoimERGdcsu2/itoQvFW1Ku/m/CuR6tj8OAyLhc9ixcno75YzCfj cCEaJrjcvt+V81IAenTkHV4L/6cG X-Google-Smtp-Source: ACcGV63P90cbJ/Bhk2o2/+ob0RzI6vZulPL2e84VAAbpvlC+FIHw6uPQV9hQRktfn4dwpStzY09GFw== X-Received: by 2002:a17:902:850b:: with SMTP id bj11-v6mr34730883plb.107.1539956289470; Fri, 19 Oct 2018 06:38:09 -0700 (PDT) Received: from machine421.caveonetworks.com ([115.113.156.2]) by smtp.googlemail.com with ESMTPSA id p82-v6sm46097709pfa.47.2018.10.19.06.38.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 19 Oct 2018 06:38:08 -0700 (PDT) From: sunil.kovvuri@gmail.com To: netdev@vger.kernel.org, davem@davemloft.net Cc: arnd@arndb.de, linux-soc@vger.kernel.org, Vamsi Attunuru , Sunil Goutham Subject: [PATCH 03/17] octeontx2-af: Reset NIXLF's Rx/Tx stats Date: Fri, 19 Oct 2018 19:07:24 +0530 Message-Id: <1539956258-29377-4-git-send-email-sunil.kovvuri@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1539956258-29377-1-git-send-email-sunil.kovvuri@gmail.com> References: <1539956258-29377-1-git-send-email-sunil.kovvuri@gmail.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Vamsi Attunuru This patch adds a new mailbox message to reset a NIXLF's receive and transmit HW stats. Signed-off-by: Vamsi Attunuru Signed-off-by: Sunil Goutham --- drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 3 ++- drivers/net/ethernet/marvell/octeontx2/af/rvu.h | 2 ++ .../net/ethernet/marvell/octeontx2/af/rvu_nix.c | 30 ++++++++++++++++++++++ 3 files changed, 34 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h index f2e0743..f8efeaa 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h @@ -155,7 +155,8 @@ M(NIX_AQ_ENQ, 0x8002, nix_aq_enq_req, nix_aq_enq_rsp) \ M(NIX_HWCTX_DISABLE, 0x8003, hwctx_disable_req, msg_rsp) \ M(NIX_TXSCH_ALLOC, 0x8004, nix_txsch_alloc_req, nix_txsch_alloc_rsp) \ M(NIX_TXSCH_FREE, 0x8005, nix_txsch_free_req, msg_rsp) \ -M(NIX_TXSCHQ_CFG, 0x8006, nix_txschq_config, msg_rsp) +M(NIX_TXSCHQ_CFG, 0x8006, nix_txschq_config, msg_rsp) \ +M(NIX_STATS_RST, 0x8007, msg_req, msg_rsp) /* Messages initiated by AF (range 0xC00 - 0xDFF) */ #define MBOX_UP_CGX_MESSAGES \ diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h index 4b15552..f041d0a 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h @@ -288,4 +288,6 @@ int rvu_mbox_handler_NIX_TXSCH_FREE(struct rvu *rvu, int rvu_mbox_handler_NIX_TXSCHQ_CFG(struct rvu *rvu, struct nix_txschq_config *req, struct msg_rsp *rsp); +int rvu_mbox_handler_NIX_STATS_RST(struct rvu *rvu, struct msg_req *req, + struct msg_rsp *rsp); #endif /* RVU_H */ diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c index 56f242d..62d8913 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c @@ -1053,6 +1053,36 @@ static int nix_setup_txschq(struct rvu *rvu, struct nix_hw *nix_hw, int blkaddr) return 0; } +int rvu_mbox_handler_NIX_STATS_RST(struct rvu *rvu, struct msg_req *req, + struct msg_rsp *rsp) +{ + struct rvu_hwinfo *hw = rvu->hw; + u16 pcifunc = req->hdr.pcifunc; + int i, nixlf, blkaddr; + u64 stats; + + blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc); + if (blkaddr < 0) + return NIX_AF_ERR_AF_LF_INVALID; + + nixlf = rvu_get_lf(rvu, &hw->block[blkaddr], pcifunc, 0); + if (nixlf < 0) + return NIX_AF_ERR_AF_LF_INVALID; + + /* Get stats count supported by HW */ + stats = rvu_read64(rvu, blkaddr, NIX_AF_CONST1); + + /* Reset tx stats */ + for (i = 0; i < ((stats >> 24) & 0xFF); i++) + rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_STATX(nixlf, i), 0); + + /* Reset rx stats */ + for (i = 0; i < ((stats >> 32) & 0xFF); i++) + rvu_write64(rvu, blkaddr, NIX_AF_LFX_RX_STATX(nixlf, i), 0); + + return 0; +} + static int nix_calibrate_x2p(struct rvu *rvu, int blkaddr) { int idx, err;