From patchwork Mon Aug 17 21:52:52 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Lunn X-Patchwork-Id: 508118 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id D4D171402A0 for ; Tue, 18 Aug 2015 08:00:49 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751569AbbHQWAq (ORCPT ); Mon, 17 Aug 2015 18:00:46 -0400 Received: from vps0.lunn.ch ([178.209.37.122]:60902 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751387AbbHQWAp (ORCPT ); Mon, 17 Aug 2015 18:00:45 -0400 Received: from andrew by vps0.lunn.ch with local (Exim 4.80) (envelope-from ) id 1ZRSL0-00014D-3r; Mon, 17 Aug 2015 23:53:02 +0200 From: Andrew Lunn To: David Miller Cc: Guenter Roeck , Florian Fainelli , Vivien Didelot , netdev , Andrew Lunn Subject: [PATCH net-next 3/3] dsa: mv88e6xxx: Set DSA mode based on chip abilities Date: Mon, 17 Aug 2015 23:52:52 +0200 Message-Id: <1439848372-4055-4-git-send-email-andrew@lunn.ch> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1439848372-4055-1-git-send-email-andrew@lunn.ch> References: <1439848372-4055-1-git-send-email-andrew@lunn.ch> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Older devices only support a single DSA frame format, where as newer devices have two. Take this into account when configuring a DSA port. The port needs to be in plain old DSA mode, since this is a DSA link, where as the newer format can be used for the CPU port. Signed-off-by: Andrew Lunn --- drivers/net/dsa/mv88e6xxx.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/net/dsa/mv88e6xxx.c b/drivers/net/dsa/mv88e6xxx.c index 486e9792fc05..2ab3f9810593 100644 --- a/drivers/net/dsa/mv88e6xxx.c +++ b/drivers/net/dsa/mv88e6xxx.c @@ -1987,12 +1987,15 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port) reg |= PORT_CONTROL_EGRESS_ADD_TAG; } } - if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) || - mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) || - mv88e6xxx_6095_family(ds) || mv88e6xxx_6065_family(ds) || - mv88e6xxx_6320_family(ds)) { - if (dsa_is_dsa_port(ds, port)) + if (dsa_is_dsa_port(ds, port)) { + if (mv88e6xxx_6095_family(ds) || mv88e6xxx_6185_family(ds)) + reg |= PORT_CONTROL_DSA_TAG; + if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) || + mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) || + mv88e6xxx_6320_family(ds)) { reg |= PORT_CONTROL_FRAME_MODE_DSA; + } + if (port == dsa_upstream_port(ds)) reg |= PORT_CONTROL_FORWARD_UNKNOWN | PORT_CONTROL_FORWARD_UNKNOWN_MC;