From patchwork Thu Jun 13 02:11:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ammy Yi X-Patchwork-Id: 1114919 X-Patchwork-Delegate: petr.vorel@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=lists.linux.it (client-ip=2001:1418:10:5::2; helo=picard.linux.it; envelope-from=ltp-bounces+incoming=patchwork.ozlabs.org@lists.linux.it; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from picard.linux.it (picard.linux.it [IPv6:2001:1418:10:5::2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45PSbC4mLZz9s9y for ; Thu, 13 Jun 2019 12:38:12 +1000 (AEST) Received: from picard.linux.it (localhost [IPv6:::1]) by picard.linux.it (Postfix) with ESMTP id AFB2C3EAE30 for ; Thu, 13 Jun 2019 04:38:03 +0200 (CEST) X-Original-To: ltp@lists.linux.it Delivered-To: ltp@picard.linux.it Received: from in-4.smtp.seeweb.it (in-4.smtp.seeweb.it [IPv6:2001:4b78:1:20::4]) by picard.linux.it (Postfix) with ESMTP id 8B63B3EA6CF for ; Thu, 13 Jun 2019 04:38:01 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by in-4.smtp.seeweb.it (Postfix) with ESMTPS id 76EA91001550 for ; Thu, 13 Jun 2019 04:37:24 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Jun 2019 19:37:26 -0700 X-ExtLoop1: 1 Received: from yifei-server.sh.intel.com ([10.239.13.18]) by fmsmga004.fm.intel.com with ESMTP; 12 Jun 2019 19:37:25 -0700 From: Ammy Yi To: ltp@lists.linux.it Date: Thu, 13 Jun 2019 10:11:38 +0800 Message-Id: <20190613021138.5313-1-ammy.yi@intel.com> X-Mailer: git-send-email 2.14.1 X-Virus-Scanned: clamav-milter 0.99.2 at in-4.smtp.seeweb.it X-Virus-Status: Clean X-Spam-Status: No, score=0.0 required=7.0 tests=SPF_HELO_NONE,SPF_PASS autolearn=disabled version=3.4.0 X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on in-4.smtp.seeweb.it Cc: Ammy Yi Subject: [LTP] [PATCH v5 ltp] Add 4 more cases for Intel PT. X-BeenThere: ltp@lists.linux.it X-Mailman-Version: 2.1.18 Precedence: list List-Id: Linux Test Project List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: ltp-bounces+incoming=patchwork.ozlabs.org@lists.linux.it Sender: "ltp" 1. Add Intel PT sanpshot mode test. 2. Add Intel PT exclude user trace mode test. 3. Add Intel PT exclude kernel trace mode test. 4. Add Intel PT disable branch trace mode test. Signed-off-by: Ammy Yi --- runtest/tracing | 4 ++ testcases/kernel/tracing/pt_test/pt_test.c | 67 ++++++++++++++++++++++++------ 2 files changed, 58 insertions(+), 13 deletions(-) diff --git a/runtest/tracing b/runtest/tracing index 504132d70..d2700ca57 100644 --- a/runtest/tracing +++ b/runtest/tracing @@ -4,3 +4,7 @@ ftrace_regression02 ftrace_regression02.sh ftrace-stress-test ftrace_stress_test.sh 90 dynamic_debug01 dynamic_debug01.sh pt_full_trace_basic pt_test +pt_snapshot_trace_basic pt_test -m +pt_ex_user pt_test -e user +pt_ex_kernel pt_test -e kernel +pt_disable_branch pt_test -b diff --git a/testcases/kernel/tracing/pt_test/pt_test.c b/testcases/kernel/tracing/pt_test/pt_test.c index 5feb1aa63..593f6c260 100644 --- a/testcases/kernel/tracing/pt_test/pt_test.c +++ b/testcases/kernel/tracing/pt_test/pt_test.c @@ -6,14 +6,14 @@ */ /* - * This test will check if Intel PT(Intel Processer Trace) full trace mode is - * working. + * This test will check if Intel PT(Intel Processer Trace) is working. * * Intel CPU of 5th-generation Core (Broadwell) or newer is required for the test. * * kconfig requirement: CONFIG_PERF_EVENTS */ + #include #include #include @@ -40,22 +40,35 @@ int fde = -1; //map head and size uint64_t **bufm; long buhsz; +static char *str_mode; +static char *str_exclude_info; +static char *str_branch_flag; +int mode = 1; -static uint64_t **create_map(int fde, long bufsize) +static uint64_t **create_map(int fde, long bufsize, int flag) { uint64_t **buf_ev; + int pro_flag; struct perf_event_mmap_page *pc; buf_ev = SAFE_MALLOC(2*sizeof(uint64_t *)); buf_ev[0] = NULL; buf_ev[1] = NULL; + if (flag == 1) { + tst_res(TINFO, "memory will be r/w for full trace mode!"); + pro_flag = PROT_READ | PROT_WRITE; + } else { + tst_res(TINFO, "memory will be r only for snapshot mode!"); + pro_flag = PROT_READ; + } buf_ev[0] = SAFE_MMAP(NULL, INTEL_PT_MEMSIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fde, 0); + tst_res(TINFO, "Open Intel PT event failed."); pc = (struct perf_event_mmap_page *)buf_ev[0]; pc->aux_offset = INTEL_PT_MEMSIZE; pc->aux_size = bufsize; - buf_ev[1] = SAFE_MMAP(NULL, bufsize, PROT_READ | PROT_WRITE, + buf_ev[1] = SAFE_MMAP(NULL, bufsize, pro_flag, MAP_SHARED, fde, INTEL_PT_MEMSIZE); return buf_ev; } @@ -89,7 +102,7 @@ static void del_map(uint64_t **buf_ev, long bufsize) free(buf_ev); } -static void intel_pt_full_trace_check(void) +static void intel_pt_trace_check(void) { uint64_t aux_head = 0; struct perf_event_mmap_page *pmp; @@ -104,11 +117,11 @@ static void intel_pt_full_trace_check(void) pmp = (struct perf_event_mmap_page *)bufm[0]; aux_head = *(volatile uint64_t *)&pmp->aux_head; if (aux_head == 0) { - tst_res(TFAIL, "There is no trace!"); + tst_res(TFAIL, "There is no trace."); return; } - tst_res(TPASS, "perf trace full mode is passed!"); + tst_res(TPASS, "perf trace test is passed."); } static void setup(void) @@ -116,6 +129,7 @@ static void setup(void) struct perf_event_attr attr = {}; buhsz = 2 * PAGESIZE; + if (access(INTEL_PT_PATH, F_OK)) { tst_brk(TCONF, "Requires Intel Core 5th+ generation (Broadwell and newer)" @@ -130,20 +144,38 @@ static void setup(void) attr.config = BIT(intel_pt_pmu_value(INTEL_PT_FORMAT_TSC)) | BIT(intel_pt_pmu_value(INTEL_PT_FORMAT_NRT)); attr.size = sizeof(struct perf_event_attr); - attr.exclude_kernel = 0; - attr.exclude_user = 0; attr.mmap = 1; + if (str_branch_flag) { + tst_res(TINFO, "Intel PT will disable branch trace."); + attr.config |= 1; + } + + attr.exclude_kernel = 0; + attr.exclude_user = 0; + if (str_exclude_info) { + if (!strcmp(str_exclude_info, "user")) { + tst_res(TINFO, "Intel PT will exclude user trace."); + attr.exclude_user = 1; + } else if (!strcmp(str_exclude_info, "kernel")) { + tst_res(TINFO, "Intel PT will exclude kernel trace."); + attr.exclude_kernel = 1; + } else { + tst_brk(TBROK, "Invalid -e '%s'", str_exclude_info); + } + } /* only get trace for own pid */ fde = tst_syscall(__NR_perf_event_open, &attr, 0, -1, -1, 0); if (fde < 0) { - tst_res(TINFO, "Open Intel PT event failed!"); - tst_res(TFAIL, "perf trace full mode is failed!"); + tst_res(TINFO, "Open Intel PT event failed."); + tst_res(TFAIL, "perf trace full mode is failed."); return; } bufm = NULL; - bufm = create_map(fde, buhsz); + if (str_mode) + mode = 0; + bufm = create_map(fde, buhsz, mode); } static void cleanup(void) @@ -154,8 +186,17 @@ static void cleanup(void) del_map(bufm, buhsz); } +static struct tst_option options[] = { + {"m", &str_mode, "-m different mode, default is full mode"}, + {"e:", &str_exclude_info, "-e exclude info, user or kernel"}, + {"b", &str_branch_flag, "-b if disable branch trace"}, + {NULL, NULL, NULL} +}; + + static struct tst_test test = { - .test_all = intel_pt_full_trace_check, + .test_all = intel_pt_trace_check, + .options = options, .min_kver = "4.1", .setup = setup, .cleanup = cleanup,