| Message ID | b05b61ccb5f10279d46fed490796f32ea2ccc270.1620727160.git.sathvika@linux.vnet.ibm.com (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | powerpc/sstep: Add emulation support and tests for 'setb' instruction | expand |
| Related | show |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/apply_patch | success | Successfully applied on branch powerpc/merge (fcc98c6d0289241dded10b74f8198fc4ecb22bd1) |
| snowpatch_ozlabs/build-ppc64le | success | Build succeeded |
| snowpatch_ozlabs/build-ppc64be | success | Build succeeded |
| snowpatch_ozlabs/build-ppc64e | success | Build succeeded |
| snowpatch_ozlabs/build-pmac32 | success | Build succeeded |
| snowpatch_ozlabs/checkpatch | warning | total: 0 errors, 0 warnings, 1 checks, 48 lines checked |
| snowpatch_ozlabs/needsstable | success | Patch has no Fixes tags |
Sathvika Vasireddy wrote: > This adds selftests for setb instruction. > > Signed-off-by: Sathvika Vasireddy <sathvika@linux.vnet.ibm.com> > --- > arch/powerpc/include/asm/ppc-opcode.h | 1 + > arch/powerpc/lib/test_emulate_step.c | 29 +++++++++++++++++++++++++++++ > 2 files changed, 30 insertions(+) Tested-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> > > diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h > index ac41776661e9..927551dd870b 100644 > --- a/arch/powerpc/include/asm/ppc-opcode.h > +++ b/arch/powerpc/include/asm/ppc-opcode.h > @@ -245,6 +245,7 @@ > #define PPC_INST_STRING 0x7c00042a > #define PPC_INST_STRING_MASK 0xfc0007fe > #define PPC_INST_STRING_GEN_MASK 0xfc00067e > +#define PPC_INST_SETB 0x7c000100 > #define PPC_INST_STSWI 0x7c0005aa > #define PPC_INST_STSWX 0x7c00052a > #define PPC_INST_TRECHKPT 0x7c0007dd > diff --git a/arch/powerpc/lib/test_emulate_step.c b/arch/powerpc/lib/test_emulate_step.c > index 783d1b85ecfe..a0a52fe5e979 100644 > --- a/arch/powerpc/lib/test_emulate_step.c > +++ b/arch/powerpc/lib/test_emulate_step.c > @@ -53,6 +53,8 @@ > ppc_inst_prefix(PPC_PREFIX_MLS | __PPC_PRFX_R(pr) | IMM_H(i), \ > PPC_RAW_ADDI(t, a, i)) > > +#define TEST_SETB(t, bfa) ppc_inst(PPC_INST_SETB | ___PPC_RT(t) | ___PPC_RA((bfa & 0x7) << 2)) > + > > static void __init init_pt_regs(struct pt_regs *regs) > { > @@ -929,6 +931,33 @@ static struct compute_test compute_tests[] = { > } > } > }, > + { > + .mnemonic = "setb", > + .cpu_feature = CPU_FTR_ARCH_300, > + .subtests = { > + { > + .descr = "BFA = 1, CR = GT", > + .instr = TEST_SETB(20, 1), > + .regs = { > + .ccr = 0x4000000, > + } > + }, > + { > + .descr = "BFA = 4, CR = LT", > + .instr = TEST_SETB(20, 4), > + .regs = { > + .ccr = 0x8000, > + } > + }, > + { > + .descr = "BFA = 5, CR = EQ", > + .instr = TEST_SETB(20, 5), > + .regs = { > + .ccr = 0x200, > + } > + } > + } > + }, > { > .mnemonic = "add", > .subtests = { > -- > 2.16.4 > >
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h index ac41776661e9..927551dd870b 100644 --- a/arch/powerpc/include/asm/ppc-opcode.h +++ b/arch/powerpc/include/asm/ppc-opcode.h @@ -245,6 +245,7 @@ #define PPC_INST_STRING 0x7c00042a #define PPC_INST_STRING_MASK 0xfc0007fe #define PPC_INST_STRING_GEN_MASK 0xfc00067e +#define PPC_INST_SETB 0x7c000100 #define PPC_INST_STSWI 0x7c0005aa #define PPC_INST_STSWX 0x7c00052a #define PPC_INST_TRECHKPT 0x7c0007dd diff --git a/arch/powerpc/lib/test_emulate_step.c b/arch/powerpc/lib/test_emulate_step.c index 783d1b85ecfe..a0a52fe5e979 100644 --- a/arch/powerpc/lib/test_emulate_step.c +++ b/arch/powerpc/lib/test_emulate_step.c @@ -53,6 +53,8 @@ ppc_inst_prefix(PPC_PREFIX_MLS | __PPC_PRFX_R(pr) | IMM_H(i), \ PPC_RAW_ADDI(t, a, i)) +#define TEST_SETB(t, bfa) ppc_inst(PPC_INST_SETB | ___PPC_RT(t) | ___PPC_RA((bfa & 0x7) << 2)) + static void __init init_pt_regs(struct pt_regs *regs) { @@ -929,6 +931,33 @@ static struct compute_test compute_tests[] = { } } }, + { + .mnemonic = "setb", + .cpu_feature = CPU_FTR_ARCH_300, + .subtests = { + { + .descr = "BFA = 1, CR = GT", + .instr = TEST_SETB(20, 1), + .regs = { + .ccr = 0x4000000, + } + }, + { + .descr = "BFA = 4, CR = LT", + .instr = TEST_SETB(20, 4), + .regs = { + .ccr = 0x8000, + } + }, + { + .descr = "BFA = 5, CR = EQ", + .instr = TEST_SETB(20, 5), + .regs = { + .ccr = 0x200, + } + } + } + }, { .mnemonic = "add", .subtests = {
This adds selftests for setb instruction. Signed-off-by: Sathvika Vasireddy <sathvika@linux.vnet.ibm.com> --- arch/powerpc/include/asm/ppc-opcode.h | 1 + arch/powerpc/lib/test_emulate_step.c | 29 +++++++++++++++++++++++++++++ 2 files changed, 30 insertions(+)