From patchwork Mon Apr 28 15:22:26 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Kumar Chaurasiya X-Patchwork-Id: 2078431 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=GppPbP7m; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; helo=lists.ozlabs.org; envelope-from=linuxppc-dev+bounces-8107-incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=patchwork.ozlabs.org) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2404:9400:2:0:216:3eff:fee1:b9f1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4ZmS0L6pRKz1yMg for ; Tue, 29 Apr 2025 01:24:02 +1000 (AEST) Received: from boromir.ozlabs.org (localhost [127.0.0.1]) by lists.ozlabs.org (Postfix) with ESMTP id 4ZmS0g6spjz30MZ; Tue, 29 Apr 2025 01:24:19 +1000 (AEST) X-Original-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; arc=none smtp.remote-ip=148.163.156.1 ARC-Seal: i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707; t=1745853859; cv=none; b=E/u08zjM/zvcyZnB7WLZYI8Bya6FgWxE/uDrDhReEM96Ug6CkbibbA28Eniq/VB8JO1GVr/W0CTfF5kd+bHrZvTDvgmXvBsp+45v3qnhFrItLdqGtyzNfJelWOIiKq+Jlp04Ck+efsfUPmOYwocPfO9nwxvZSAyQoXZfPuqPZYLT8IGZVEEoL9K7BYqxKa25+6yanltKs+Z7Uti/jHAODm1H/pbg7bhg8KbjmRTNpVBrZzc/sUn4kMPJnqzkI817Ve2fG0ygWADblkoC80kXxafo1HZFD6zXAJHCqoBtehqnFvQkmV9NV4Zstukj+AynJDNgoYdGoLIoASjfAkPE/Q== ARC-Message-Signature: i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707; t=1745853859; c=relaxed/relaxed; bh=rxz4PIIKNL79mlTmcsnS8rvNKbTYb5T5PL+4JOqG8UE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=cplMmkjLeXZJMVkA4sSiaQWAQh9Lq9ZahW+HBX/aX22NbWKRsPpfwEfUA2lLDK+ihmiU0Q4ARTueuYoO/PAbxto1XsVO6+viwFrBLDs0O2GIGkRIjdy0CHtjOSDcX4A4h+6ScD8FhkbAJsRCLzVKpiXYnEOHlLnKvU2TyJxd1n7aoRfpc/BmssXr58zCsnqhrkAXmOYnriSt4kUZ340VxIEfWcFd9ifjRDIOvhZYgpsGHd2hEQZq8ewiVH1SqfSsYXg0FUEbYMemPf+k3qUgPMuvxxeDRMNp+KvreqGp9igLG0a7H7kHlrrCOdN2xNhzi8AZR4vKBPoyw8kTYGEmjw== ARC-Authentication-Results: i=1; lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=linux.ibm.com; dkim=pass (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=GppPbP7m; dkim-atps=neutral; spf=pass (client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=mchauras@linux.ibm.com; receiver=lists.ozlabs.org) smtp.mailfrom=linux.ibm.com Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=linux.ibm.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=GppPbP7m; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=linux.ibm.com (client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=mchauras@linux.ibm.com; receiver=lists.ozlabs.org) Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4ZmS0g1gT4z3064 for ; Tue, 29 Apr 2025 01:24:19 +1000 (AEST) Received: from pps.filterd (m0353729.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 53SAenSd011884; Mon, 28 Apr 2025 15:24:02 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc :content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=pp1; bh=rxz4PIIKNL79mlTmc snS8rvNKbTYb5T5PL+4JOqG8UE=; b=GppPbP7mLsyqYpFwEjZQd43HEUwARklT9 UcWweegYCRawo0jO7VMcwdwooo6kAfhuTgKtUPh+FpnZDxJXxXZKJympkAuP4LAE RwaI/aPobV8fPRzOeL7cOcOutt8DlYoF5YpSdsjPs+Ok3fHH8Oc+QCYB96j8Kgh/ seBNH9yggUiANyBq7l2BNyMd0/i+48KXxKD149IPr49rNIOvfbSt015jt8lwb5IR ZYBkEL76kYXsUq9EsXmQLRMsrnHT9YFc797rGqJto29gfMZ127MveRJPmXev7i3e fYH6DH/Dpzof0DtN9nqt/4BizWw4s7vKh0ZLVoUaSkWmE+CnlPzCA== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 469v5km2be-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 28 Apr 2025 15:24:01 +0000 (GMT) Received: from m0353729.ppops.net (m0353729.ppops.net [127.0.0.1]) by pps.reinject (8.18.0.8/8.18.0.8) with ESMTP id 53SFLV4n003969; Mon, 28 Apr 2025 15:24:01 GMT Received: from ppma13.dal12v.mail.ibm.com (dd.9e.1632.ip4.static.sl-reverse.com [50.22.158.221]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 469v5km2ba-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 28 Apr 2025 15:24:01 +0000 (GMT) Received: from pps.filterd (ppma13.dal12v.mail.ibm.com [127.0.0.1]) by ppma13.dal12v.mail.ibm.com (8.18.1.2/8.18.1.2) with ESMTP id 53SCFEjJ024634; Mon, 28 Apr 2025 15:24:00 GMT Received: from smtprelay07.fra02v.mail.ibm.com ([9.218.2.229]) by ppma13.dal12v.mail.ibm.com (PPS) with ESMTPS id 469c1kxsup-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 28 Apr 2025 15:24:00 +0000 Received: from smtpav05.fra02v.mail.ibm.com (smtpav05.fra02v.mail.ibm.com [10.20.54.104]) by smtprelay07.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 53SFNunM50004238 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 28 Apr 2025 15:23:56 GMT Received: from smtpav05.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 60FA820043; Mon, 28 Apr 2025 15:23:56 +0000 (GMT) Received: from smtpav05.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B57C720040; Mon, 28 Apr 2025 15:23:50 +0000 (GMT) Received: from li-e1dea04c-3555-11b2-a85c-f57333552245.ibm.com.com (unknown [9.39.30.54]) by smtpav05.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 28 Apr 2025 15:23:50 +0000 (GMT) From: Mukesh Kumar Chaurasiya To: linux-kernel@vger.kernel.org Cc: maddy@linux.ibm.com, mpe@ellerman.id.au, npiggin@gmail.com, christophe.leroy@csgroup.eu, naveen@kernel.org, neeraj.upadhyay@kernel.org, vschneid@redhat.com, tglx@linutronix.de, frederic@kernel.org, ankur.a.arora@oracle.com, sshegde@linux.ibm.com, bigeasy@linutronix.de, kees@kernel.org, oleg@redhat.com, peterz@infradead.org, tzimmermann@suse.de, namcao@linutronix.de, kan.liang@linux.intel.com, mcgrof@kernel.org, rppt@kernel.org, atrajeev@linux.vnet.ibm.com, anjalik@linux.ibm.com, coltonlewis@google.com, linuxppc-dev@lists.ozlabs.org, Mukesh Kumar Chaurasiya Subject: [RFC V1 5/6] powerpc: Introduce syscall exit arch functions Date: Mon, 28 Apr 2025 20:52:26 +0530 Message-ID: <20250428152225.66044-8-mchauras@linux.ibm.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250428152225.66044-2-mchauras@linux.ibm.com> References: <20250428152225.66044-2-mchauras@linux.ibm.com> X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: wCDTmAvoEMfSPF6shKYQZ5OQ6brX7n3T X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNDI4MDEyNCBTYWx0ZWRfXz6sIio0O9DgU PH5M8VL013H1mD1SZqs9No3xs6bFRBMnt2w7sd6P6T9rK4Lj3QUb1WnLsKuDDOWqngiVGJOcGS4 BMEalvKYKUETKtoD+g9Xa9oG9chgEzTLK9pPHHF99ZQzrf+LsSTAwFm86aVQwcqWrH40EaLtgmp dZbdFWwCOzydjnXk3hMd9LwdPFsE07ENamC2TNdkmf8OAYadgbcVdXPwvmibPj9PMJvaG2IjFZ2 nNCn3IBS/0qvkKc312wSozYjD90e8p0YMzEwhJUKh6BcemokIPGjKMAxgr10U8NNTuvSOT5ERnP BpdkL8Ds0kxPq2SoF+4XBBSiiSbNNtHBAVhrqrF8SmHMXehaWkzaRzh4LEtoNerwi07QZV9ik3j pCK7c7Jii8c/GuPCBtQlnpz023BUygU2qFDwDrmEdaTJnQYalkRpTJd6RBEAtTWPW+SCqqG4 X-Proofpoint-GUID: i_dNbm4CnI6Zr80TVTeMx88xPyHsLP01 X-Authority-Analysis: v=2.4 cv=DvxW+H/+ c=1 sm=1 tr=0 ts=680f9d91 cx=c_pps a=AfN7/Ok6k8XGzOShvHwTGQ==:117 a=AfN7/Ok6k8XGzOShvHwTGQ==:17 a=XR8D0OoHHMoA:10 a=VnNF1IyMAAAA:8 a=azVfos6laG1Ide8r4ucA:9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-04-28_05,2025-04-24_02,2025-02-21_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 bulkscore=0 lowpriorityscore=0 malwarescore=0 spamscore=0 mlxlogscore=999 phishscore=0 impostorscore=0 suspectscore=0 adultscore=0 clxscore=1015 priorityscore=1501 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2504070000 definitions=main-2504280124 X-Spam-Status: No, score=-0.7 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS autolearn=disabled version=4.0.1 OzLabs 8 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org Introducing following functions for syscall exit - arch_exit_to_user_mode_work - arch_exit_to_user_mode_work_prepare Signed-off-by: Mukesh Kumar Chaurasiya --- arch/powerpc/include/asm/entry-common.h | 51 +++++++++++++++ arch/powerpc/include/asm/interrupt.h | 82 +++++++++++++++++++++++++ arch/powerpc/kernel/interrupt.c | 81 ------------------------ arch/powerpc/kernel/signal.c | 14 +++++ 4 files changed, 147 insertions(+), 81 deletions(-) diff --git a/arch/powerpc/include/asm/entry-common.h b/arch/powerpc/include/asm/entry-common.h index 804f6d019ec95..04db70afdd820 100644 --- a/arch/powerpc/include/asm/entry-common.h +++ b/arch/powerpc/include/asm/entry-common.h @@ -8,8 +8,14 @@ #include #include #include +#include #include +/* + * flags for paca->generic_fw_flags + */ +#define GFW_RESTORE_ALL 0x01 + static __always_inline void arch_enter_from_user_mode(struct pt_regs *regs) { if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG)) @@ -101,7 +107,52 @@ static __always_inline void arch_enter_from_user_mode(struct pt_regs *regs) } #endif // CONFIG_PPC_TRANSACTIONAL_MEM } + #define arch_enter_from_user_mode arch_enter_from_user_mode +static inline void arch_exit_to_user_mode_prepare(struct pt_regs *regs, + unsigned long ti_work) +{ + unsigned long mathflags; + + if (IS_ENABLED(CONFIG_PPC_BOOK3S_64) && IS_ENABLED(CONFIG_PPC_FPU)) { + if (IS_ENABLED(CONFIG_PPC_TRANSACTIONAL_MEM) && + unlikely((ti_work & _TIF_RESTORE_TM))) { + restore_tm_state(regs); + } else { + mathflags = MSR_FP; + + if (cpu_has_feature(CPU_FTR_VSX)) + mathflags |= MSR_VEC | MSR_VSX; + else if (cpu_has_feature(CPU_FTR_ALTIVEC)) + mathflags |= MSR_VEC; + + /* + * If userspace MSR has all available FP bits set, + * then they are live and no need to restore. If not, + * it means the regs were given up and restore_math + * may decide to restore them (to avoid taking an FP + * fault). + */ + if ((regs->msr & mathflags) != mathflags) + restore_math(regs); + } + } + + check_return_regs_valid(regs); +#ifdef CONFIG_PPC_TRANSACTIONAL_MEM + local_paca->tm_scratch = regs->msr; +#endif +} +#define arch_exit_to_user_mode_prepare arch_exit_to_user_mode_prepare + +static __always_inline void arch_exit_to_user_mode(void) +{ + booke_load_dbcr0(); + + account_cpu_user_exit(); +} +#define arch_exit_to_user_mode arch_exit_to_user_mode + #endif /* CONFIG_GENERIC_ENTRY */ #endif /* _ASM_PPC_ENTRY_COMMON_H */ diff --git a/arch/powerpc/include/asm/interrupt.h b/arch/powerpc/include/asm/interrupt.h index 6edf064a0fea2..c6ab286a723f2 100644 --- a/arch/powerpc/include/asm/interrupt.h +++ b/arch/powerpc/include/asm/interrupt.h @@ -68,6 +68,8 @@ #include #include +#include /* for show_regs */ + #include #include #include @@ -173,6 +175,86 @@ static inline void booke_restore_dbcr0(void) #endif } +static inline void check_return_regs_valid(struct pt_regs *regs) +{ +#ifdef CONFIG_PPC_BOOK3S_64 + unsigned long trap, srr0, srr1; + static bool warned; + u8 *validp; + char *h; + + if (trap_is_scv(regs)) + return; + + trap = TRAP(regs); + // EE in HV mode sets HSRRs like 0xea0 + if (cpu_has_feature(CPU_FTR_HVMODE) && trap == INTERRUPT_EXTERNAL) + trap = 0xea0; + + switch (trap) { + case 0x980: + case INTERRUPT_H_DATA_STORAGE: + case 0xe20: + case 0xe40: + case INTERRUPT_HMI: + case 0xe80: + case 0xea0: + case INTERRUPT_H_FAC_UNAVAIL: + case 0x1200: + case 0x1500: + case 0x1600: + case 0x1800: + validp = &local_paca->hsrr_valid; + if (!READ_ONCE(*validp)) + return; + + srr0 = mfspr(SPRN_HSRR0); + srr1 = mfspr(SPRN_HSRR1); + h = "H"; + + break; + default: + validp = &local_paca->srr_valid; + if (!READ_ONCE(*validp)) + return; + + srr0 = mfspr(SPRN_SRR0); + srr1 = mfspr(SPRN_SRR1); + h = ""; + break; + } + + if (srr0 == regs->nip && srr1 == regs->msr) + return; + + /* + * A NMI / soft-NMI interrupt may have come in after we found + * srr_valid and before the SRRs are loaded. The interrupt then + * comes in and clobbers SRRs and clears srr_valid. Then we load + * the SRRs here and test them above and find they don't match. + * + * Test validity again after that, to catch such false positives. + * + * This test in general will have some window for false negatives + * and may not catch and fix all such cases if an NMI comes in + * later and clobbers SRRs without clearing srr_valid, but hopefully + * such things will get caught most of the time, statistically + * enough to be able to get a warning out. + */ + if (!READ_ONCE(*validp)) + return; + + if (!data_race(warned)) { + data_race(warned = true); + printk("%sSRR0 was: %lx should be: %lx\n", h, srr0, regs->nip); + printk("%sSRR1 was: %lx should be: %lx\n", h, srr1, regs->msr); + show_regs(regs); + } + + WRITE_ONCE(*validp, 0); /* fixup */ +#endif +} + static inline void interrupt_enter_prepare(struct pt_regs *regs) { #ifdef CONFIG_PPC64 diff --git a/arch/powerpc/kernel/interrupt.c b/arch/powerpc/kernel/interrupt.c index 44afc65e0e0e0..7f31f3fb9c1d8 100644 --- a/arch/powerpc/kernel/interrupt.c +++ b/arch/powerpc/kernel/interrupt.c @@ -4,7 +4,6 @@ #include #include #include -#include /* for show_regs */ #include #include @@ -74,86 +73,6 @@ static notrace __always_inline bool prep_irq_for_enabled_exit(bool restartable) return true; } -static notrace void check_return_regs_valid(struct pt_regs *regs) -{ -#ifdef CONFIG_PPC_BOOK3S_64 - unsigned long trap, srr0, srr1; - static bool warned; - u8 *validp; - char *h; - - if (trap_is_scv(regs)) - return; - - trap = TRAP(regs); - // EE in HV mode sets HSRRs like 0xea0 - if (cpu_has_feature(CPU_FTR_HVMODE) && trap == INTERRUPT_EXTERNAL) - trap = 0xea0; - - switch (trap) { - case 0x980: - case INTERRUPT_H_DATA_STORAGE: - case 0xe20: - case 0xe40: - case INTERRUPT_HMI: - case 0xe80: - case 0xea0: - case INTERRUPT_H_FAC_UNAVAIL: - case 0x1200: - case 0x1500: - case 0x1600: - case 0x1800: - validp = &local_paca->hsrr_valid; - if (!READ_ONCE(*validp)) - return; - - srr0 = mfspr(SPRN_HSRR0); - srr1 = mfspr(SPRN_HSRR1); - h = "H"; - - break; - default: - validp = &local_paca->srr_valid; - if (!READ_ONCE(*validp)) - return; - - srr0 = mfspr(SPRN_SRR0); - srr1 = mfspr(SPRN_SRR1); - h = ""; - break; - } - - if (srr0 == regs->nip && srr1 == regs->msr) - return; - - /* - * A NMI / soft-NMI interrupt may have come in after we found - * srr_valid and before the SRRs are loaded. The interrupt then - * comes in and clobbers SRRs and clears srr_valid. Then we load - * the SRRs here and test them above and find they don't match. - * - * Test validity again after that, to catch such false positives. - * - * This test in general will have some window for false negatives - * and may not catch and fix all such cases if an NMI comes in - * later and clobbers SRRs without clearing srr_valid, but hopefully - * such things will get caught most of the time, statistically - * enough to be able to get a warning out. - */ - if (!READ_ONCE(*validp)) - return; - - if (!data_race(warned)) { - data_race(warned = true); - printk("%sSRR0 was: %lx should be: %lx\n", h, srr0, regs->nip); - printk("%sSRR1 was: %lx should be: %lx\n", h, srr1, regs->msr); - show_regs(regs); - } - - WRITE_ONCE(*validp, 0); /* fixup */ -#endif -} - static notrace unsigned long interrupt_exit_user_prepare_main(unsigned long ret, struct pt_regs *regs) { diff --git a/arch/powerpc/kernel/signal.c b/arch/powerpc/kernel/signal.c index aa17e62f37547..719930cf4ae1f 100644 --- a/arch/powerpc/kernel/signal.c +++ b/arch/powerpc/kernel/signal.c @@ -22,6 +22,11 @@ #include "signal.h" +/* This will be removed */ +#ifdef CONFIG_GENERIC_ENTRY +#include +#endif /* CONFIG_GENERIC_ENTRY */ + #ifdef CONFIG_VSX unsigned long copy_fpr_to_user(void __user *to, struct task_struct *task) @@ -368,3 +373,12 @@ void signal_fault(struct task_struct *tsk, struct pt_regs *regs, printk_ratelimited(regs->msr & MSR_64BIT ? fm64 : fm32, tsk->comm, task_pid_nr(tsk), where, ptr, regs->nip, regs->link); } + +#ifdef CONFIG_GENERIC_ENTRY +void arch_do_signal_or_restart(struct pt_regs *regs) +{ + BUG_ON(regs != current->thread.regs); + local_paca->generic_fw_flags |= GFW_RESTORE_ALL; + do_signal(current); +} +#endif /* CONFIG_GENERIC_ENTRY */