| Message ID | 20221109045112.187069-8-bgray@linux.ibm.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 274d842fa1efd9449e62222c8896e0be11621f1f |
| Headers | show |
| Series | powerpc/code-patching: Use temporary mm for Radix MMU | expand |
Le 09/11/2022 à 05:51, Benjamin Gray a écrit : > Adds a local TLB flush operation that works given an mm_struct, VA to > flush, and page size representation. Most implementations mirror the > surrounding code. The book3s/32/tlbflush.h implementation is left as > a BUILD_BUG because it is more complicated and not required for > anything as yet. > > This removes the need to create a vm_area_struct, which the temporary > patching mm work does not need. > > Signed-off-by: Benjamin Gray <bgray@linux.ibm.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> > --- > v10: * Change warning to BUILD_BUG > v9: * Replace book3s/32/tlbflush.h implementation with warning > --- > arch/powerpc/include/asm/book3s/32/tlbflush.h | 9 +++++++++ > arch/powerpc/include/asm/book3s/64/tlbflush.h | 7 +++++++ > arch/powerpc/include/asm/nohash/tlbflush.h | 7 +++++++ > arch/powerpc/mm/nohash/tlb.c | 8 ++++++++ > 4 files changed, 31 insertions(+) > > diff --git a/arch/powerpc/include/asm/book3s/32/tlbflush.h b/arch/powerpc/include/asm/book3s/32/tlbflush.h > index ba1743c52b56..4be572908124 100644 > --- a/arch/powerpc/include/asm/book3s/32/tlbflush.h > +++ b/arch/powerpc/include/asm/book3s/32/tlbflush.h > @@ -2,6 +2,8 @@ > #ifndef _ASM_POWERPC_BOOK3S_32_TLBFLUSH_H > #define _ASM_POWERPC_BOOK3S_32_TLBFLUSH_H > > +#include <linux/build_bug.h> > + > #define MMU_NO_CONTEXT (0) > /* > * TLB flushing for "classic" hash-MMU 32-bit CPUs, 6xx, 7xx, 7xxx > @@ -74,6 +76,13 @@ static inline void local_flush_tlb_page(struct vm_area_struct *vma, > { > flush_tlb_page(vma, vmaddr); > } > + > +static inline void local_flush_tlb_page_psize(struct mm_struct *mm, > + unsigned long vmaddr, int psize) > +{ > + BUILD_BUG(); > +} > + > static inline void local_flush_tlb_mm(struct mm_struct *mm) > { > flush_tlb_mm(mm); > diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush.h b/arch/powerpc/include/asm/book3s/64/tlbflush.h > index c56a0aee8124..dd39313242b4 100644 > --- a/arch/powerpc/include/asm/book3s/64/tlbflush.h > +++ b/arch/powerpc/include/asm/book3s/64/tlbflush.h > @@ -86,6 +86,13 @@ static inline void local_flush_tlb_page(struct vm_area_struct *vma, > radix__local_flush_tlb_page(vma, vmaddr); > } > > +static inline void local_flush_tlb_page_psize(struct mm_struct *mm, > + unsigned long vmaddr, int psize) > +{ > + if (radix_enabled()) > + radix__local_flush_tlb_page_psize(mm, vmaddr, psize); > +} > + > static inline void tlb_flush(struct mmu_gather *tlb) > { > if (radix_enabled()) > diff --git a/arch/powerpc/include/asm/nohash/tlbflush.h b/arch/powerpc/include/asm/nohash/tlbflush.h > index 0cef5e4f8d92..d98de9e3896f 100644 > --- a/arch/powerpc/include/asm/nohash/tlbflush.h > +++ b/arch/powerpc/include/asm/nohash/tlbflush.h > @@ -44,6 +44,12 @@ static inline void local_flush_tlb_page(struct vm_area_struct *vma, unsigned lon > asm volatile ("tlbie %0; sync" : : "r" (vmaddr) : "memory"); > } > > +static inline void local_flush_tlb_page_psize(struct mm_struct *mm, > + unsigned long vmaddr, int psize) > +{ > + asm volatile ("tlbie %0; sync" : : "r" (vmaddr) : "memory"); > +} > + > static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end) > { > start &= PAGE_MASK; > @@ -57,6 +63,7 @@ static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end > void flush_tlb_kernel_range(unsigned long start, unsigned long end); > void local_flush_tlb_mm(struct mm_struct *mm); > void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr); > +void local_flush_tlb_page_psize(struct mm_struct *mm, unsigned long vmaddr, int psize); > > void __local_flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr, > int tsize, int ind); > diff --git a/arch/powerpc/mm/nohash/tlb.c b/arch/powerpc/mm/nohash/tlb.c > index 2c15c86c7015..a903b308acc5 100644 > --- a/arch/powerpc/mm/nohash/tlb.c > +++ b/arch/powerpc/mm/nohash/tlb.c > @@ -184,6 +184,14 @@ void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr) > mmu_get_tsize(mmu_virtual_psize), 0); > } > EXPORT_SYMBOL(local_flush_tlb_page); > + > +void local_flush_tlb_page_psize(struct mm_struct *mm, > + unsigned long vmaddr, int psize) > +{ > + __local_flush_tlb_page(mm, vmaddr, mmu_get_tsize(psize), 0); > +} > +EXPORT_SYMBOL(local_flush_tlb_page_psize); > + > #endif > > /*
diff --git a/arch/powerpc/include/asm/book3s/32/tlbflush.h b/arch/powerpc/include/asm/book3s/32/tlbflush.h index ba1743c52b56..4be572908124 100644 --- a/arch/powerpc/include/asm/book3s/32/tlbflush.h +++ b/arch/powerpc/include/asm/book3s/32/tlbflush.h @@ -2,6 +2,8 @@ #ifndef _ASM_POWERPC_BOOK3S_32_TLBFLUSH_H #define _ASM_POWERPC_BOOK3S_32_TLBFLUSH_H +#include <linux/build_bug.h> + #define MMU_NO_CONTEXT (0) /* * TLB flushing for "classic" hash-MMU 32-bit CPUs, 6xx, 7xx, 7xxx @@ -74,6 +76,13 @@ static inline void local_flush_tlb_page(struct vm_area_struct *vma, { flush_tlb_page(vma, vmaddr); } + +static inline void local_flush_tlb_page_psize(struct mm_struct *mm, + unsigned long vmaddr, int psize) +{ + BUILD_BUG(); +} + static inline void local_flush_tlb_mm(struct mm_struct *mm) { flush_tlb_mm(mm); diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush.h b/arch/powerpc/include/asm/book3s/64/tlbflush.h index c56a0aee8124..dd39313242b4 100644 --- a/arch/powerpc/include/asm/book3s/64/tlbflush.h +++ b/arch/powerpc/include/asm/book3s/64/tlbflush.h @@ -86,6 +86,13 @@ static inline void local_flush_tlb_page(struct vm_area_struct *vma, radix__local_flush_tlb_page(vma, vmaddr); } +static inline void local_flush_tlb_page_psize(struct mm_struct *mm, + unsigned long vmaddr, int psize) +{ + if (radix_enabled()) + radix__local_flush_tlb_page_psize(mm, vmaddr, psize); +} + static inline void tlb_flush(struct mmu_gather *tlb) { if (radix_enabled()) diff --git a/arch/powerpc/include/asm/nohash/tlbflush.h b/arch/powerpc/include/asm/nohash/tlbflush.h index 0cef5e4f8d92..d98de9e3896f 100644 --- a/arch/powerpc/include/asm/nohash/tlbflush.h +++ b/arch/powerpc/include/asm/nohash/tlbflush.h @@ -44,6 +44,12 @@ static inline void local_flush_tlb_page(struct vm_area_struct *vma, unsigned lon asm volatile ("tlbie %0; sync" : : "r" (vmaddr) : "memory"); } +static inline void local_flush_tlb_page_psize(struct mm_struct *mm, + unsigned long vmaddr, int psize) +{ + asm volatile ("tlbie %0; sync" : : "r" (vmaddr) : "memory"); +} + static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end) { start &= PAGE_MASK; @@ -57,6 +63,7 @@ static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end void flush_tlb_kernel_range(unsigned long start, unsigned long end); void local_flush_tlb_mm(struct mm_struct *mm); void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr); +void local_flush_tlb_page_psize(struct mm_struct *mm, unsigned long vmaddr, int psize); void __local_flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr, int tsize, int ind); diff --git a/arch/powerpc/mm/nohash/tlb.c b/arch/powerpc/mm/nohash/tlb.c index 2c15c86c7015..a903b308acc5 100644 --- a/arch/powerpc/mm/nohash/tlb.c +++ b/arch/powerpc/mm/nohash/tlb.c @@ -184,6 +184,14 @@ void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr) mmu_get_tsize(mmu_virtual_psize), 0); } EXPORT_SYMBOL(local_flush_tlb_page); + +void local_flush_tlb_page_psize(struct mm_struct *mm, + unsigned long vmaddr, int psize) +{ + __local_flush_tlb_page(mm, vmaddr, mmu_get_tsize(psize), 0); +} +EXPORT_SYMBOL(local_flush_tlb_page_psize); + #endif /*
Adds a local TLB flush operation that works given an mm_struct, VA to flush, and page size representation. Most implementations mirror the surrounding code. The book3s/32/tlbflush.h implementation is left as a BUILD_BUG because it is more complicated and not required for anything as yet. This removes the need to create a vm_area_struct, which the temporary patching mm work does not need. Signed-off-by: Benjamin Gray <bgray@linux.ibm.com> --- v10: * Change warning to BUILD_BUG v9: * Replace book3s/32/tlbflush.h implementation with warning --- arch/powerpc/include/asm/book3s/32/tlbflush.h | 9 +++++++++ arch/powerpc/include/asm/book3s/64/tlbflush.h | 7 +++++++ arch/powerpc/include/asm/nohash/tlbflush.h | 7 +++++++ arch/powerpc/mm/nohash/tlb.c | 8 ++++++++ 4 files changed, 31 insertions(+)