| Message ID | 20220601040117.1467710-1-aik@ozlabs.ru (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | [kernel] powerpc/pseries/iommu: Print ibm,query-pe-dma-windows parameters | expand |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/github-powerpc_selftests | success | Successfully ran 10 jobs. |
| snowpatch_ozlabs/github-powerpc_ppctests | success | Successfully ran 10 jobs. |
| snowpatch_ozlabs/github-powerpc_clang | success | Successfully ran 7 jobs. |
| snowpatch_ozlabs/github-powerpc_sparse | success | Successfully ran 4 jobs. |
| snowpatch_ozlabs/github-powerpc_kernel_qemu | success | Successfully ran 24 jobs. |
On Wed, 1 Jun 2022 14:01:17 +1000, Alexey Kardashevskiy wrote: > PowerVM has a stricter policy about allocating TCEs for LPARs and > often there is not enough TCEs for 1:1 mapping, this adds the supported > numbers into dev_info() to help analyzing bugreports. > > Applied to powerpc/next. [1/1] powerpc/pseries/iommu: Print ibm,query-pe-dma-windows parameters https://git.kernel.org/powerpc/c/a28a2eff1e0ff684f51b3dc6371ff5b651a063d4 cheers
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c index 7639e7355df2..84edc8d730e1 100644 --- a/arch/powerpc/platforms/pseries/iommu.c +++ b/arch/powerpc/platforms/pseries/iommu.c @@ -1022,9 +1022,6 @@ static int query_ddw(struct pci_dev *dev, const u32 *ddw_avail, ret = rtas_call(ddw_avail[DDW_QUERY_PE_DMA_WIN], 3, out_sz, query_out, cfg_addr, BUID_HI(buid), BUID_LO(buid)); - dev_info(&dev->dev, "ibm,query-pe-dma-windows(%x) %x %x %x returned %d\n", - ddw_avail[DDW_QUERY_PE_DMA_WIN], cfg_addr, BUID_HI(buid), - BUID_LO(buid), ret); switch (out_sz) { case 5: @@ -1042,6 +1039,11 @@ static int query_ddw(struct pci_dev *dev, const u32 *ddw_avail, break; } + dev_info(&dev->dev, "ibm,query-pe-dma-windows(%x) %x %x %x returned %d, lb=%llx ps=%x wn=%d\n", + ddw_avail[DDW_QUERY_PE_DMA_WIN], cfg_addr, BUID_HI(buid), + BUID_LO(buid), ret, query->largest_available_block, + query->page_size, query->windows_available); + return ret; }
PowerVM has a stricter policy about allocating TCEs for LPARs and often there is not enough TCEs for 1:1 mapping, this adds the supported numbers into dev_info() to help analyzing bugreports. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> --- A PowerVM admin can enable "enlarged IO capacity" for a passed though PCI device but there is no way from inside LPAR to know if that worked or how many more TCEs became available. --- arch/powerpc/platforms/pseries/iommu.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-)