| Message ID | 20220303053315.1056880-3-npiggin@gmail.com (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | KVM: PPC: Book3S HV interrupt fixes | expand |
Nicholas Piggin <npiggin@gmail.com> writes: > If there is a pending xive interrupt, inject it at guest entry (if > MSR[EE] is enabled) rather than take another interrupt when the guest > is entered. If xive is enabled then LPCR[LPES] is set so this behaviour > should be expected. > > Signed-off-by: Nicholas Piggin <npiggin@gmail.com> > --- > arch/powerpc/kvm/book3s_hv.c | 9 +++++++-- > 1 file changed, 7 insertions(+), 2 deletions(-) > > diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c > index f8c0f1f52a1e..5df359053147 100644 > --- a/arch/powerpc/kvm/book3s_hv.c > +++ b/arch/powerpc/kvm/book3s_hv.c > @@ -4524,9 +4524,14 @@ int kvmhv_run_single_vcpu(struct kvm_vcpu *vcpu, u64 time_limit, > > if (!nested) { > kvmppc_core_prepare_to_enter(vcpu); > - if (test_bit(BOOK3S_IRQPRIO_EXTERNAL, > - &vcpu->arch.pending_exceptions)) > + if (vcpu->arch.shregs.msr & MSR_EE) { > + if (xive_interrupt_pending(vcpu)) > + kvmppc_inject_interrupt_hv(vcpu, > + BOOK3S_INTERRUPT_EXTERNAL, 0); > + } else if (test_bit(BOOK3S_IRQPRIO_EXTERNAL, > + &vcpu->arch.pending_exceptions)) { > lpcr |= LPCR_MER; > + } > } else if (vcpu->arch.pending_exceptions || > vcpu->arch.doorbell_request || > xive_interrupt_pending(vcpu)) { Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com>
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c index f8c0f1f52a1e..5df359053147 100644 --- a/arch/powerpc/kvm/book3s_hv.c +++ b/arch/powerpc/kvm/book3s_hv.c @@ -4524,9 +4524,14 @@ int kvmhv_run_single_vcpu(struct kvm_vcpu *vcpu, u64 time_limit, if (!nested) { kvmppc_core_prepare_to_enter(vcpu); - if (test_bit(BOOK3S_IRQPRIO_EXTERNAL, - &vcpu->arch.pending_exceptions)) + if (vcpu->arch.shregs.msr & MSR_EE) { + if (xive_interrupt_pending(vcpu)) + kvmppc_inject_interrupt_hv(vcpu, + BOOK3S_INTERRUPT_EXTERNAL, 0); + } else if (test_bit(BOOK3S_IRQPRIO_EXTERNAL, + &vcpu->arch.pending_exceptions)) { lpcr |= LPCR_MER; + } } else if (vcpu->arch.pending_exceptions || vcpu->arch.doorbell_request || xive_interrupt_pending(vcpu)) {
If there is a pending xive interrupt, inject it at guest entry (if MSR[EE] is enabled) rather than take another interrupt when the guest is entered. If xive is enabled then LPCR[LPES] is set so this behaviour should be expected. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> --- arch/powerpc/kvm/book3s_hv.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-)