| Message ID | 20210622105736.633352-39-npiggin@gmail.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | KVM: PPC: Book3S HV P9: entry/exit optimisations round 1 | expand |
| Related | show |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/apply_patch | warning | Failed to apply on branch powerpc/merge (7f030e9d57b8ff6025bde4162f42378e6081126a) |
| snowpatch_ozlabs/apply_patch | warning | Failed to apply on branch powerpc/next (9a0b020d61685913a1504398273ccec8dbc8c32e) |
| snowpatch_ozlabs/apply_patch | warning | Failed to apply on branch linus/master (a96bfed64c8986d6404e553f18203cae1f5ac7e6) |
| snowpatch_ozlabs/apply_patch | warning | Failed to apply on branch powerpc/fixes (60b7ed54a41b550d50caf7f2418db4a7e75b5bdc) |
| snowpatch_ozlabs/apply_patch | warning | Failed to apply on branch linux-next (13311e74253fe64329390df80bed3f07314ddd61) |
| snowpatch_ozlabs/apply_patch | fail | Failed to apply to any branch |
Nicholas Piggin <npiggin@gmail.com> writes: > Some of the DAWR SPR access is already predicated on dawr_enabled(), > apply this to the remainder of the accesses. > > Signed-off-by: Nicholas Piggin <npiggin@gmail.com> > --- > arch/powerpc/kvm/book3s_hv_p9_entry.c | 34 ++++++++++++++++----------- > 1 file changed, 20 insertions(+), 14 deletions(-) > > diff --git a/arch/powerpc/kvm/book3s_hv_p9_entry.c b/arch/powerpc/kvm/book3s_hv_p9_entry.c > index 7aa72efcac6c..f305d1d6445c 100644 > --- a/arch/powerpc/kvm/book3s_hv_p9_entry.c > +++ b/arch/powerpc/kvm/book3s_hv_p9_entry.c > @@ -638,13 +638,16 @@ int kvmhv_vcpu_entry_p9(struct kvm_vcpu *vcpu, u64 time_limit, unsigned long lpc > > host_hfscr = mfspr(SPRN_HFSCR); > host_ciabr = mfspr(SPRN_CIABR); > - host_dawr0 = mfspr(SPRN_DAWR0); > - host_dawrx0 = mfspr(SPRN_DAWRX0); > host_psscr = mfspr(SPRN_PSSCR); > host_pidr = mfspr(SPRN_PID); > - if (cpu_has_feature(CPU_FTR_DAWR1)) { > - host_dawr1 = mfspr(SPRN_DAWR1); > - host_dawrx1 = mfspr(SPRN_DAWRX1); > + > + if (dawr_enabled()) { > + host_dawr0 = mfspr(SPRN_DAWR0); > + host_dawrx0 = mfspr(SPRN_DAWRX0); > + if (cpu_has_feature(CPU_FTR_DAWR1)) { > + host_dawr1 = mfspr(SPRN_DAWR1); > + host_dawrx1 = mfspr(SPRN_DAWRX1); The userspace needs to enable DAWR1 via KVM_CAP_PPC_DAWR1. That cap is not even implemented in QEMU currently, so we never allow the guest to set vcpu->arch.dawr1. If we check for kvm->arch.dawr1_enabled instead of the CPU feature, we could shave some more time here. > + } > } > > local_paca->kvm_hstate.host_purr = mfspr(SPRN_PURR); > @@ -951,15 +954,18 @@ int kvmhv_vcpu_entry_p9(struct kvm_vcpu *vcpu, u64 time_limit, unsigned long lpc > mtspr(SPRN_HFSCR, host_hfscr); > if (vcpu->arch.ciabr != host_ciabr) > mtspr(SPRN_CIABR, host_ciabr); > - if (vcpu->arch.dawr0 != host_dawr0) > - mtspr(SPRN_DAWR0, host_dawr0); > - if (vcpu->arch.dawrx0 != host_dawrx0) > - mtspr(SPRN_DAWRX0, host_dawrx0); > - if (cpu_has_feature(CPU_FTR_DAWR1)) { > - if (vcpu->arch.dawr1 != host_dawr1) > - mtspr(SPRN_DAWR1, host_dawr1); > - if (vcpu->arch.dawrx1 != host_dawrx1) > - mtspr(SPRN_DAWRX1, host_dawrx1); > + > + if (dawr_enabled()) { > + if (vcpu->arch.dawr0 != host_dawr0) > + mtspr(SPRN_DAWR0, host_dawr0); > + if (vcpu->arch.dawrx0 != host_dawrx0) > + mtspr(SPRN_DAWRX0, host_dawrx0); > + if (cpu_has_feature(CPU_FTR_DAWR1)) { > + if (vcpu->arch.dawr1 != host_dawr1) > + mtspr(SPRN_DAWR1, host_dawr1); > + if (vcpu->arch.dawrx1 != host_dawrx1) > + mtspr(SPRN_DAWRX1, host_dawrx1); > + } > } > > if (vc->dpdes)
Excerpts from Fabiano Rosas's message of July 1, 2021 3:51 am: > Nicholas Piggin <npiggin@gmail.com> writes: > >> Some of the DAWR SPR access is already predicated on dawr_enabled(), >> apply this to the remainder of the accesses. >> >> Signed-off-by: Nicholas Piggin <npiggin@gmail.com> >> --- >> arch/powerpc/kvm/book3s_hv_p9_entry.c | 34 ++++++++++++++++----------- >> 1 file changed, 20 insertions(+), 14 deletions(-) >> >> diff --git a/arch/powerpc/kvm/book3s_hv_p9_entry.c b/arch/powerpc/kvm/book3s_hv_p9_entry.c >> index 7aa72efcac6c..f305d1d6445c 100644 >> --- a/arch/powerpc/kvm/book3s_hv_p9_entry.c >> +++ b/arch/powerpc/kvm/book3s_hv_p9_entry.c >> @@ -638,13 +638,16 @@ int kvmhv_vcpu_entry_p9(struct kvm_vcpu *vcpu, u64 time_limit, unsigned long lpc >> >> host_hfscr = mfspr(SPRN_HFSCR); >> host_ciabr = mfspr(SPRN_CIABR); >> - host_dawr0 = mfspr(SPRN_DAWR0); >> - host_dawrx0 = mfspr(SPRN_DAWRX0); >> host_psscr = mfspr(SPRN_PSSCR); >> host_pidr = mfspr(SPRN_PID); >> - if (cpu_has_feature(CPU_FTR_DAWR1)) { >> - host_dawr1 = mfspr(SPRN_DAWR1); >> - host_dawrx1 = mfspr(SPRN_DAWRX1); >> + >> + if (dawr_enabled()) { >> + host_dawr0 = mfspr(SPRN_DAWR0); >> + host_dawrx0 = mfspr(SPRN_DAWRX0); >> + if (cpu_has_feature(CPU_FTR_DAWR1)) { >> + host_dawr1 = mfspr(SPRN_DAWR1); >> + host_dawrx1 = mfspr(SPRN_DAWRX1); > > The userspace needs to enable DAWR1 via KVM_CAP_PPC_DAWR1. That cap is > not even implemented in QEMU currently, so we never allow the guest to > set vcpu->arch.dawr1. If we check for kvm->arch.dawr1_enabled instead of > the CPU feature, we could shave some more time here. Ah good point, yes let's do that. Thanks, Nick
diff --git a/arch/powerpc/kvm/book3s_hv_p9_entry.c b/arch/powerpc/kvm/book3s_hv_p9_entry.c index 7aa72efcac6c..f305d1d6445c 100644 --- a/arch/powerpc/kvm/book3s_hv_p9_entry.c +++ b/arch/powerpc/kvm/book3s_hv_p9_entry.c @@ -638,13 +638,16 @@ int kvmhv_vcpu_entry_p9(struct kvm_vcpu *vcpu, u64 time_limit, unsigned long lpc host_hfscr = mfspr(SPRN_HFSCR); host_ciabr = mfspr(SPRN_CIABR); - host_dawr0 = mfspr(SPRN_DAWR0); - host_dawrx0 = mfspr(SPRN_DAWRX0); host_psscr = mfspr(SPRN_PSSCR); host_pidr = mfspr(SPRN_PID); - if (cpu_has_feature(CPU_FTR_DAWR1)) { - host_dawr1 = mfspr(SPRN_DAWR1); - host_dawrx1 = mfspr(SPRN_DAWRX1); + + if (dawr_enabled()) { + host_dawr0 = mfspr(SPRN_DAWR0); + host_dawrx0 = mfspr(SPRN_DAWRX0); + if (cpu_has_feature(CPU_FTR_DAWR1)) { + host_dawr1 = mfspr(SPRN_DAWR1); + host_dawrx1 = mfspr(SPRN_DAWRX1); + } } local_paca->kvm_hstate.host_purr = mfspr(SPRN_PURR); @@ -951,15 +954,18 @@ int kvmhv_vcpu_entry_p9(struct kvm_vcpu *vcpu, u64 time_limit, unsigned long lpc mtspr(SPRN_HFSCR, host_hfscr); if (vcpu->arch.ciabr != host_ciabr) mtspr(SPRN_CIABR, host_ciabr); - if (vcpu->arch.dawr0 != host_dawr0) - mtspr(SPRN_DAWR0, host_dawr0); - if (vcpu->arch.dawrx0 != host_dawrx0) - mtspr(SPRN_DAWRX0, host_dawrx0); - if (cpu_has_feature(CPU_FTR_DAWR1)) { - if (vcpu->arch.dawr1 != host_dawr1) - mtspr(SPRN_DAWR1, host_dawr1); - if (vcpu->arch.dawrx1 != host_dawrx1) - mtspr(SPRN_DAWRX1, host_dawrx1); + + if (dawr_enabled()) { + if (vcpu->arch.dawr0 != host_dawr0) + mtspr(SPRN_DAWR0, host_dawr0); + if (vcpu->arch.dawrx0 != host_dawrx0) + mtspr(SPRN_DAWRX0, host_dawrx0); + if (cpu_has_feature(CPU_FTR_DAWR1)) { + if (vcpu->arch.dawr1 != host_dawr1) + mtspr(SPRN_DAWR1, host_dawr1); + if (vcpu->arch.dawrx1 != host_dawrx1) + mtspr(SPRN_DAWRX1, host_dawrx1); + } } if (vc->dpdes)
Some of the DAWR SPR access is already predicated on dawr_enabled(), apply this to the remainder of the accesses. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> --- arch/powerpc/kvm/book3s_hv_p9_entry.c | 34 ++++++++++++++++----------- 1 file changed, 20 insertions(+), 14 deletions(-)