| Message ID | 20210511212052.27242-4-chris.packham@alliedtelesis.co.nz (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | P2040/P2041 i2c recovery erratum | expand |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/apply_patch | success | Successfully applied on branch powerpc/merge (fcc98c6d0289241dded10b74f8198fc4ecb22bd1) |
| snowpatch_ozlabs/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 15 lines checked |
| snowpatch_ozlabs/needsstable | success | Patch has no Fixes tags |
Chris Packham <chris.packham@alliedtelesis.co.nz> writes: > The i2c controllers on the P1010 have an erratum where the documented > scheme for i2c bus recovery will not work (A-004447). A different > mechanism is needed which is documented in the P1010 Chip Errata Rev L. > > Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> > --- > > Notes: > Changes in v3: > - New > > arch/powerpc/boot/dts/fsl/p1010si-post.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) Acked-by: Michael Ellerman <mpe@ellerman.id.au> cheers > diff --git a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi > index c2717f31925a..ccda0a91abf0 100644 > --- a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi > +++ b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi > @@ -122,7 +122,15 @@ memory-controller@2000 { > }; > > /include/ "pq3-i2c-0.dtsi" > + i2c@3000 { > + fsl,i2c-erratum-a004447; > + }; > + > /include/ "pq3-i2c-1.dtsi" > + i2c@3100 { > + fsl,i2c-erratum-a004447; > + }; > + > /include/ "pq3-duart-0.dtsi" > /include/ "pq3-espi-0.dtsi" > spi0: spi@7000 { > -- > 2.31.1
diff --git a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi index c2717f31925a..ccda0a91abf0 100644 --- a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi @@ -122,7 +122,15 @@ memory-controller@2000 { }; /include/ "pq3-i2c-0.dtsi" + i2c@3000 { + fsl,i2c-erratum-a004447; + }; + /include/ "pq3-i2c-1.dtsi" + i2c@3100 { + fsl,i2c-erratum-a004447; + }; + /include/ "pq3-duart-0.dtsi" /include/ "pq3-espi-0.dtsi" spi0: spi@7000 {
The i2c controllers on the P1010 have an erratum where the documented scheme for i2c bus recovery will not work (A-004447). A different mechanism is needed which is documented in the P1010 Chip Errata Rev L. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> --- Notes: Changes in v3: - New arch/powerpc/boot/dts/fsl/p1010si-post.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)