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[v4,1/2] powerpc/perf: Infrastructure to support checking of attr.config*

Message ID 20210408074504.248211-1-maddy@linux.ibm.com (mailing list archive)
State Accepted
Headers show
Series [v4,1/2] powerpc/perf: Infrastructure to support checking of attr.config* | expand
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Context Check Description
snowpatch_ozlabs/apply_patch success Successfully applied on branch powerpc/merge (571b0d1ccf5cd3dc1b9866a908769ee23f7d127e)
snowpatch_ozlabs/checkpatch success total: 0 errors, 0 warnings, 0 checks, 29 lines checked
snowpatch_ozlabs/needsstable success Patch has no Fixes tags

Commit Message

Madhavan Srinivasan April 8, 2021, 7:45 a.m. UTC
Introduce code to support the checking of attr.config* for
values which are reserved for a given platform.
Performance Monitoring Unit (PMU) configuration registers
have fields that are reserved and some specific values for
bit fields are reserved. For ex., MMCRA[61:62] is
Random Sampling Mode (SM) and value of 0b11 for this field
is reserved.

Writing non-zero or invalid values in these fields will
have unknown behaviours.

Patch adds a generic call-back function "check_attr_config"
in "struct power_pmu", to be called in event_init to
check for attr.config* values for a given platform.

Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
---
Changelog v3:
-Made the check_attr_config() to be called for all event type of instead
 only for raw event type.

Changelog v2:
-Fixed commit message

Changelog v1:
-Fixed commit message and in-code comments

 arch/powerpc/include/asm/perf_event_server.h |  6 ++++++
 arch/powerpc/perf/core-book3s.c              | 11 +++++++++++
 2 files changed, 17 insertions(+)

Comments

Michael Ellerman April 19, 2021, 4 a.m. UTC | #1
On Thu, 8 Apr 2021 13:15:03 +0530, Madhavan Srinivasan wrote:
> Introduce code to support the checking of attr.config* for
> values which are reserved for a given platform.
> Performance Monitoring Unit (PMU) configuration registers
> have fields that are reserved and some specific values for
> bit fields are reserved. For ex., MMCRA[61:62] is
> Random Sampling Mode (SM) and value of 0b11 for this field
> is reserved.
> 
> [...]

Applied to powerpc/next.

[1/2] powerpc/perf: Infrastructure to support checking of attr.config*
      https://git.kernel.org/powerpc/c/2e2a441d2c0bb639b6fdbb64b15ee0a43599bcec

cheers
diff mbox series

Patch

diff --git a/arch/powerpc/include/asm/perf_event_server.h b/arch/powerpc/include/asm/perf_event_server.h
index 00e7e671bb4b..dde97d7d9253 100644
--- a/arch/powerpc/include/asm/perf_event_server.h
+++ b/arch/powerpc/include/asm/perf_event_server.h
@@ -67,6 +67,12 @@  struct power_pmu {
 	 * the pmu supports extended perf regs capability
 	 */
 	int		capabilities;
+	/*
+	 * Function to check event code for values which are
+	 * reserved. Function takes struct perf_event as input,
+	 * since event code could be spread in attr.config*
+	 */
+	int		(*check_attr_config)(struct perf_event *ev);
 };
 
 /*
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 766f064f00fb..b17358e8dc12 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -1963,6 +1963,17 @@  static int power_pmu_event_init(struct perf_event *event)
 		return -ENOENT;
 	}
 
+	/*
+	 * PMU config registers have fields that are
+	 * reserved and some specific values for bit fields are reserved.
+	 * For ex., MMCRA[61:62] is Randome Sampling Mode (SM)
+	 * and value of 0b11 to this field is reserved.
+	 * Check for invalid values in attr.config.
+	 */
+	if (ppmu->check_attr_config &&
+	    ppmu->check_attr_config(event))
+		return -EINVAL;
+
 	event->hw.config_base = ev;
 	event->hw.idx = 0;