diff mbox series

[v2] powerpc/book3s64/pkey: Disable pkey on POWER6 and before

Message ID 20200726132517.399076-1-aneesh.kumar@linux.ibm.com (mailing list archive)
State Accepted
Commit 269e829f48a0d0d27667abe25ca5c9e5b6ab08e2
Headers show
Series [v2] powerpc/book3s64/pkey: Disable pkey on POWER6 and before | expand

Commit Message

Aneesh Kumar K V July 26, 2020, 1:25 p.m. UTC
POWER6 only support AMR update via privileged mode(MSR[PR] = 0, SPRN_AMR=29)
The PR=1 alias for that SPR (SPRN_AMR=13) was only supported
from POWER7. Since we don't allow userspace modifying of AMR value
we should disable pkey support on P6 and before.

The hypervisor will still report pkey support via ibm,processor-storage-keys.
Hence check for P7 CPU_FTR bit to decide on pkey support.

Fixes: a24204c30796 ("powerpc/book3s64/pkeys: kill cpu feature key CPU_FTR_PKEY")
Reported-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
---
 arch/powerpc/mm/book3s64/pkeys.c | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Michael Ellerman July 27, 2020, 7:26 a.m. UTC | #1
On Sun, 26 Jul 2020 18:55:17 +0530, Aneesh Kumar K.V wrote:
> POWER6 only support AMR update via privileged mode(MSR[PR] = 0, SPRN_AMR=29)
> The PR=1 alias for that SPR (SPRN_AMR=13) was only supported
> from POWER7. Since we don't allow userspace modifying of AMR value
> we should disable pkey support on P6 and before.
> 
> The hypervisor will still report pkey support via ibm,processor-storage-keys.
> Hence check for P7 CPU_FTR bit to decide on pkey support.

Applied to powerpc/next.

[1/1] powerpc/book3s64/pkey: Disable pkey on POWER6 and before
      https://git.kernel.org/powerpc/c/269e829f48a0d0d27667abe25ca5c9e5b6ab08e2

cheers
diff mbox series

Patch

diff --git a/arch/powerpc/mm/book3s64/pkeys.c b/arch/powerpc/mm/book3s64/pkeys.c
index 792b36aa9619..69a6b87f2bb4 100644
--- a/arch/powerpc/mm/book3s64/pkeys.c
+++ b/arch/powerpc/mm/book3s64/pkeys.c
@@ -73,6 +73,12 @@  static int scan_pkey_feature(void)
 	if (early_radix_enabled())
 		return 0;
 
+	/*
+	 * Only P7 and above supports SPRN_AMR update with MSR[PR] = 1
+	 */
+	if (!early_cpu_has_feature(CPU_FTR_ARCH_206))
+		return 0;
+
 	ret = of_scan_flat_dt(dt_scan_storage_keys, &pkeys_total);
 	if (ret == 0) {
 		/*