Message ID | 20200406080936.7180-8-jniethe5@gmail.com (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | Initial Prefixed Instruction support | expand |
Context | Check | Description |
---|---|---|
snowpatch_ozlabs/apply_patch | warning | Failed to apply on branch powerpc/merge (2c0ce4ff35994a7b12cc9879ced52c9e7c2e6667) |
snowpatch_ozlabs/apply_patch | warning | Failed to apply on branch powerpc/next (6ba4a2d3591039aea1cb45c7c42262d26351a2fa) |
snowpatch_ozlabs/apply_patch | warning | Failed to apply on branch linus/master (a10c9c710f9ecea87b9f4bbb837467893b4bef01) |
snowpatch_ozlabs/apply_patch | success | Successfully applied on branch powerpc/fixes (1d0c32ec3b860a32df593a22bad0d1dbc5546a59) |
snowpatch_ozlabs/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 17 lines checked |
snowpatch_ozlabs/needsstable | success | Patch has no Fixes tags |
On Mon, 2020-04-06 at 18:09 +1000, Jordan Niethe wrote: > Use a function for byte swapping instructions in preparation of a more > complicated instruction type. Reviewed-by: Balamuruhan S <bala24@linux.ibm.com> > > Signed-off-by: Jordan Niethe <jniethe5@gmail.com> > --- > arch/powerpc/include/asm/inst.h | 5 +++++ > arch/powerpc/kernel/align.c | 2 +- > 2 files changed, 6 insertions(+), 1 deletion(-) > > diff --git a/arch/powerpc/include/asm/inst.h > b/arch/powerpc/include/asm/inst.h > index 15f570bef936..78eb1481f1f6 100644 > --- a/arch/powerpc/include/asm/inst.h > +++ b/arch/powerpc/include/asm/inst.h > @@ -18,4 +18,9 @@ static inline int ppc_inst_opcode(u32 x) > return x >> 26; > } > > +static inline u32 ppc_inst_swab(u32 x) > +{ > + return ppc_inst(swab32(ppc_inst_val(x))); > +} > + > #endif /* _ASM_INST_H */ > diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c > index a83d32c6513d..46870cf6a6dc 100644 > --- a/arch/powerpc/kernel/align.c > +++ b/arch/powerpc/kernel/align.c > @@ -310,7 +310,7 @@ int fix_alignment(struct pt_regs *regs) > /* We don't handle PPC little-endian any more... */ > if (cpu_has_feature(CPU_FTR_PPC_LE)) > return -EIO; > - instr = swab32(instr); > + instr = ppc_inst_swab(instr); > } > > #ifdef CONFIG_SPE
diff --git a/arch/powerpc/include/asm/inst.h b/arch/powerpc/include/asm/inst.h index 15f570bef936..78eb1481f1f6 100644 --- a/arch/powerpc/include/asm/inst.h +++ b/arch/powerpc/include/asm/inst.h @@ -18,4 +18,9 @@ static inline int ppc_inst_opcode(u32 x) return x >> 26; } +static inline u32 ppc_inst_swab(u32 x) +{ + return ppc_inst(swab32(ppc_inst_val(x))); +} + #endif /* _ASM_INST_H */ diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c index a83d32c6513d..46870cf6a6dc 100644 --- a/arch/powerpc/kernel/align.c +++ b/arch/powerpc/kernel/align.c @@ -310,7 +310,7 @@ int fix_alignment(struct pt_regs *regs) /* We don't handle PPC little-endian any more... */ if (cpu_has_feature(CPU_FTR_PPC_LE)) return -EIO; - instr = swab32(instr); + instr = ppc_inst_swab(instr); } #ifdef CONFIG_SPE
Use a function for byte swapping instructions in preparation of a more complicated instruction type. Signed-off-by: Jordan Niethe <jniethe5@gmail.com> --- arch/powerpc/include/asm/inst.h | 5 +++++ arch/powerpc/kernel/align.c | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-)