@@ -24,6 +24,8 @@
#define PME_PM_INST_CMPL 0x00002
#define PME_PM_BRU_FIN 0x10068
#define PME_PM_BR_MPRED_CMPL 0x400f6
+#define PME_PM_MEM_LOADS 0x40130
+#define PME_PM_MEM_STORES 0x40130
/*
@@ -516,6 +518,8 @@ GENERIC_EVENT_ATTR(stalled-cycles-backend, PM_CMPLU_STALL);
GENERIC_EVENT_ATTR(instructions, PM_INST_CMPL);
GENERIC_EVENT_ATTR(branch-instructions, PM_BRU_FIN);
GENERIC_EVENT_ATTR(branch-misses, PM_BR_MPRED_CMPL);
+GENERIC_EVENT_ATTR(mem-loads, PM_MEM_LOADS);
+GENERIC_EVENT_ATTR(mem-stores, PM_MEM_STORES);
static struct attribute *power8_events_attr[] = {
GENERIC_EVENT_PTR(PM_CYC),
@@ -524,6 +528,8 @@ static struct attribute *power8_events_attr[] = {
GENERIC_EVENT_PTR(PM_INST_CMPL),
GENERIC_EVENT_PTR(PM_BRU_FIN),
GENERIC_EVENT_PTR(PM_BR_MPRED_CMPL),
+ GENERIC_EVENT_PTR(PM_MEM_LOADS),
+ GENERIC_EVENT_PTR(PM_MEM_STORES),
NULL
};
[PATCH 3/7] powerpc/perf: Create mem-loads/mem-stores events for Power8 'perf mem' command depends on the support for generic hardware events 'mem-loads' and 'mem-stores'. Create those events for Power8 and map them both to the event PM_MRK_GRP_CMPL. While PM_MRK_GRP_CMPL is strictly not restricted to loads and stores, that seems to be a close/resonable match. Cc: Stephane Eranian <eranian@google.com> Cc: Paul Mckerras <paulus@samba.org> Cc: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com> --- arch/powerpc/perf/power8-pmu.c | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-)